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/linux-6.12.1/arch/riscv/kvm/
Daia_device.c65 kvm->arch.aia.in_kernel = true; in aia_create()
80 struct kvm_aia *aia = &kvm->arch.aia; in aia_config() local
106 aia->mode = *nr; in aia_config()
108 *nr = aia->mode; in aia_config()
118 aia->nr_ids = *nr; in aia_config()
120 *nr = aia->nr_ids; in aia_config()
127 aia->nr_sources = *nr; in aia_config()
129 *nr = aia->nr_sources; in aia_config()
135 aia->nr_group_bits = *nr; in aia_config()
137 *nr = aia->nr_group_bits; in aia_config()
[all …]
Daia_aplic.c248 struct aplic *aplic = kvm->arch.aia.aplic_state; in aplic_update_irq_range()
281 struct aplic *aplic = kvm->arch.aia.aplic_state; in kvm_riscv_aia_aplic_inject()
390 struct aplic *aplic = kvm->arch.aia.aplic_state; in aplic_mmio_read_offset()
448 addr - vcpu->kvm->arch.aia.aplic_addr, in aplic_mmio_read()
455 struct aplic *aplic = kvm->arch.aia.aplic_state; in aplic_mmio_write_offset()
520 addr - vcpu->kvm->arch.aia.aplic_addr, in aplic_mmio_write()
533 if (!kvm->arch.aia.aplic_state) in kvm_riscv_aia_aplic_set_attr()
547 if (!kvm->arch.aia.aplic_state) in kvm_riscv_aia_aplic_get_attr()
562 if (!kvm->arch.aia.aplic_state) in kvm_riscv_aia_aplic_has_attr()
578 if (!kvm->arch.aia.nr_sources) in kvm_riscv_aia_aplic_init()
[all …]
Dvcpu.c153 /* Setup VCPU AIA */ in kvm_arch_vcpu_create()
183 /* Cleanup VCPU AIA context */ in kvm_arch_vcpu_destroy()
353 /* Flush AIA high interrupts */ in kvm_riscv_vcpu_flush_interrupts()
387 /* Sync-up AIA high interrupts */ in kvm_riscv_vcpu_sync_interrupts()
449 /* Check AIA high interrupts */ in kvm_riscv_vcpu_has_interrupts()
791 /* Update AIA HW state before entering guest */ in kvm_arch_vcpu_ioctl_run()
Daia.c215 /* If AIA not available then redirect trap */ in kvm_riscv_vcpu_aia_rmw_topei()
219 /* If AIA not initialized then forward to user space */ in kvm_riscv_vcpu_aia_rmw_topei()
375 /* If AIA not available then redirect trap */ in kvm_riscv_vcpu_aia_rmw_ireg()
654 /* Enable KVM AIA support */ in kvm_riscv_aia_init()
DMakefile32 kvm-y += aia.o
Dmain.c105 kvm_info("AIA available with %d guest external interrupts\n", in riscv_kvm_init()
Daia_imsic.c743 if (kvm->arch.aia.mode == KVM_DEV_RISCV_AIA_MODE_EMUL) in kvm_riscv_vcpu_aia_imsic_update()
761 if (kvm->arch.aia.mode == KVM_DEV_RISCV_AIA_MODE_HWACCEL) { in kvm_riscv_vcpu_aia_imsic_update()
1029 if (!kvm->arch.aia.nr_ids) in kvm_riscv_vcpu_aia_imsic_init()
1039 imsic->nr_msis = kvm->arch.aia.nr_ids + 1; in kvm_riscv_vcpu_aia_imsic_init()
Dvcpu_onereg.c849 /* copy AIA csr regs */ in copy_csr_reg_indices()
/linux-6.12.1/tools/arch/riscv/include/asm/
Dcsr.h172 /* AIA CSR bits */
301 /* Supervisor-Level Window to Indirectly Accessed Registers (AIA) */
305 /* Supervisor-Level Interrupts (AIA) */
309 /* Supervisor-Level High-Half CSRs (AIA) */
342 /* Virtual Interrupts and Interrupt Priorities (H-extension with AIA) */
348 /* VS-Level Window to Indirectly Accessed Registers (H-extension with AIA) */
352 /* VS-Level Interrupts (H-extension with AIA) */
356 /* Hypervisor and VS-Level High-Half CSRs (H-extension with AIA) */
388 /* Machine-Level Window to Indirectly Accessed Registers (AIA) */
392 /* Machine-Level Interrupts (AIA) */
[all …]
/linux-6.12.1/arch/riscv/include/asm/
Dcsr.h174 /* AIA CSR bits */
303 /* Supervisor-Level Window to Indirectly Accessed Registers (AIA) */
307 /* Supervisor-Level Interrupts (AIA) */
311 /* Supervisor-Level High-Half CSRs (AIA) */
344 /* Virtual Interrupts and Interrupt Priorities (H-extension with AIA) */
350 /* VS-Level Window to Indirectly Accessed Registers (H-extension with AIA) */
354 /* VS-Level Interrupts (H-extension with AIA) */
358 /* Hypervisor and VS-Level High-Half CSRs (H-extension with AIA) */
390 /* Machine-Level Window to Indirectly Accessed Registers (AIA) */
394 /* Machine-Level Interrupts (AIA) */
[all …]
Dkvm_aia.h63 /* CPU AIA CSR context of Guest VCPU */
66 /* CPU AIA CSR context upon Guest VCPU reset */
81 #define kvm_riscv_aia_initialized(k) ((k)->arch.aia.initialized)
83 #define irqchip_in_kernel(k) ((k)->arch.aia.in_kernel)
Dkvm_host.h115 /* AIA Guest/VM context */
116 struct kvm_aia aia; member
263 /* AIA VCPU context */
/linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/
Driscv,imsics.yaml13 The RISC-V advanced interrupt architecture (AIA) defines a per-CPU incoming
15 AIA specification can be found at https://github.com/riscv/riscv-aia.
19 a IMSIC interrupt file is done using AIA CSRs and it also has a 4KB MMIO
29 follows a particular scheme defined by the RISC-V AIA specification. A IMSIC
Driscv,aplic.yaml13 The RISC-V advanced interrupt architecture (AIA) defines an advanced
15 in a RISC-V platform. The RISC-V AIA specification can be found at
16 https://github.com/riscv/riscv-aia.
51 Given APLIC domain forwards wired interrupts as MSIs to a AIA incoming
/linux-6.12.1/arch/riscv/include/uapi/asm/
Dkvm.h85 /* AIA CSR registers for KVM_GET_ONE_REG and KVM_SET_ONE_REG */
293 /* Device Control API: RISC-V AIA */
310 * Modes of RISC-V AIA device:
361 /* One single KVM irqchip, ie. the AIA */
/linux-6.12.1/drivers/irqchip/
Dirq-riscv-aplic-msi.c44 * sources" of the RISC-V AIA specification says: in aplic_msi_irq_retrigger_level()
197 * controller to be RISC-V AIA IMSIC controller. in aplic_msi_setup()
Dirq-riscv-intc.c202 riscv_isa_extension_available(NULL, SxAIA) ? " using AIA" : ""); in riscv_intc_init_common()
Dirq-riscv-imsic-state.c741 pr_err("%pfwP: AIA support not available\n", fwnode); in imsic_setup_state()
/linux-6.12.1/tools/testing/selftests/kvm/riscv/
Dget-reg-list.c115 /* AIA registers are always available when Ssaia can't be disabled */ in filter_reg()
871 {"aia", .feature = KVM_RISCV_ISA_EXT_SSAIA, .regs = aia_regs, .regs_n = ARRAY_SIZE(aia_regs),}
945 KVM_ISA_EXT_SUBLIST_CONFIG(aia, AIA);
/linux-6.12.1/Documentation/devicetree/bindings/riscv/
Dextensions.yaml129 request #42 from riscv/jhauser-2023-RC4") of riscv-aia.
142 ("Merge pull request #42 from riscv/jhauser-2023-RC4") of riscv-aia.
/linux-6.12.1/
DMAINTAINERS19815 RISC-V AIA DRIVERS