| /linux-6.12.1/arch/arm/boot/dts/intel/axm/ |
| D | axm5516-cpus.dtsi | 74 compatible = "arm,cortex-a15";
82 compatible = "arm,cortex-a15";
90 compatible = "arm,cortex-a15";
98 compatible = "arm,cortex-a15";
106 compatible = "arm,cortex-a15";
114 compatible = "arm,cortex-a15";
122 compatible = "arm,cortex-a15";
130 compatible = "arm,cortex-a15";
138 compatible = "arm,cortex-a15";
146 compatible = "arm,cortex-a15";
[all …]
|
| /linux-6.12.1/arch/arm/boot/dts/arm/ |
| D | vexpress-v2p-ca15_a7.dts | 40 compatible = "arm,cortex-a15";
50 compatible = "arm,cortex-a15";
150 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
226 pmu-a15 {
227 compatible = "arm,cortex-a15-pmu";
257 /* A15 PLL 0 reference clock */
266 /* A15 PLL 1 reference clock */
337 regulator-a15 {
338 /* A15 CPU core voltage */
341 regulator-name = "A15 Vcore";
[all …]
|
| D | vexpress-v2p-ca15-tc1.dts | 6 * Cortex-A15 MPCore (V2P-CA15)
40 compatible = "arm,cortex-a15";
46 compatible = "arm,cortex-a15";
95 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
136 compatible = "arm,cortex-a15-pmu";
|
| /linux-6.12.1/arch/arm/boot/dts/calxeda/ |
| D | ecx-2000.dts | 22 compatible = "arm,cortex-a15";
30 compatible = "arm,cortex-a15";
38 compatible = "arm,cortex-a15";
46 compatible = "arm,cortex-a15";
70 compatible = "arm,cortex-a15-timer", "arm,armv7-timer"; interrupts = <1 13 0xf08>,
83 compatible = "arm,cortex-a15-gic";
|
| /linux-6.12.1/Documentation/devicetree/bindings/arm/cpu-enable-method/ |
| D | al,alpine-smp | 12 Compatible CPUs: "arm,cortex-a15"
38 compatible = "arm,cortex-a15";
44 compatible = "arm,cortex-a15";
50 compatible = "arm,cortex-a15";
56 compatible = "arm,cortex-a15";
|
| /linux-6.12.1/arch/arm/boot/dts/amazon/ |
| D | alpine.dtsi | 47 compatible = "arm,cortex-a15";
54 compatible = "arm,cortex-a15";
61 compatible = "arm,cortex-a15";
68 compatible = "arm,cortex-a15";
83 compatible = "arm,cortex-a15-timer",
95 compatible = "arm,cortex-a15-gic";
122 compatible = "arm,cortex-a15-pmu";
|
| /linux-6.12.1/arch/arm/boot/dts/hisilicon/ |
| D | hip04.dtsi | 89 compatible = "arm,cortex-a15";
94 compatible = "arm,cortex-a15";
99 compatible = "arm,cortex-a15";
104 compatible = "arm,cortex-a15";
109 compatible = "arm,cortex-a15";
114 compatible = "arm,cortex-a15";
119 compatible = "arm,cortex-a15";
124 compatible = "arm,cortex-a15";
129 compatible = "arm,cortex-a15";
134 compatible = "arm,cortex-a15";
[all …]
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| /linux-6.12.1/arch/arm64/crypto/ |
| D | chacha-neon-core.S | 183 a15 .req w28
235 mov a15, v15.s[0]
261 eor a15, a15, a3
270 ror a15, a15, #16
283 add a11, a11, a15
328 eor a15, a15, a3
337 ror a15, a15, #24
350 add a11, a11, a15
389 eor a15, a15, a0
398 ror a15, a15, #16
[all …]
|
| /linux-6.12.1/arch/arm/boot/dts/samsung/ |
| D | exynos5420-cpus.dtsi | 9 * boards: CPU[0123] being the A15.
14 * Exynos5420 and Exynos5800 always boot from Cortex-A15. On Exynos5422
59 compatible = "arm,cortex-a15";
71 compatible = "arm,cortex-a15";
83 compatible = "arm,cortex-a15";
95 compatible = "arm,cortex-a15";
|
| D | exynos5422-cpus.dtsi | 13 * Exynos5420 and Exynos5800 always boot from Cortex-A15. On Exynos5422
110 compatible = "arm,cortex-a15";
123 compatible = "arm,cortex-a15";
136 compatible = "arm,cortex-a15";
149 compatible = "arm,cortex-a15";
|
| D | exynos5410.dtsi | 35 compatible = "arm,cortex-a15";
42 compatible = "arm,cortex-a15";
49 compatible = "arm,cortex-a15";
56 compatible = "arm,cortex-a15";
|
| /linux-6.12.1/arch/arm/boot/dts/xen/ |
| D | xenvm-4.2.dts | 6 * Cortex-A15 MPCore (V2P-CA15)
30 compatible = "arm,cortex-a15";
36 compatible = "arm,cortex-a15";
55 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
|
| /linux-6.12.1/arch/arm/mach-sunxi/ |
| D | headsmp.S | 9 * SMP support for sunxi based systems with Cortex A7/A15
23 * Cortex-A15. These settings are from the vendor kernel.
34 /* The following is Cortex-A15 specific */
55 /* End of Cortex-A15 specific setup */
|
| /linux-6.12.1/arch/xtensa/lib/ |
| D | umulsidi3.S | 19 s32i a15, sp, 28
113 set_arg_ ## yhalf (a15, yreg); \
155 l32i a15, sp, 28
194 result is returned in a12, and a8 and a15 are clobbered. */
223 mul_mulsi3_body a12, a13, a14, a15, a8
|
| /linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/ |
| D | arm,gic.yaml | 30 - arm,cortex-a15-gic
44 - arm,cortex-a15-gic
53 - const: arm,cortex-a15-gic
132 - const: PERIPHCLKEN # for "arm,cortex-a15-gic"
204 compatible = "arm,cortex-a15-gic";
|
| /linux-6.12.1/arch/arm/boot/dts/ti/keystone/ |
| D | keystone-k2e.dtsi | 21 compatible = "arm,cortex-a15";
27 compatible = "arm,cortex-a15";
33 compatible = "arm,cortex-a15";
39 compatible = "arm,cortex-a15";
|
| D | keystone-k2hk.dtsi | 21 compatible = "arm,cortex-a15";
27 compatible = "arm,cortex-a15";
33 compatible = "arm,cortex-a15";
39 compatible = "arm,cortex-a15";
|
| /linux-6.12.1/arch/arm/include/debug/ |
| D | exynos.S | 23 teq \tmp, #0xf0 @@ A15
27 teq \tmp, #0x100 @@ A15 + A7 but boot to A7
|
| /linux-6.12.1/Documentation/devicetree/bindings/cpu/ |
| D | cpu-capacity.txt | 206 compatible = "arm,cortex-a15";
213 compatible = "arm,cortex-a15";
220 compatible = "arm,cortex-a15";
227 compatible = "arm,cortex-a15";
|
| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_eeprom.c | 44 * devices is: 1010XYZD, A15:A8, A7:A0,
51 * of, and needs to specify only XYZ, A15:A8, A7:0, bits,
73 * namely the 19-bits "XYZ,A15:A0", as a single 19-bit address. For
75 * XYZ=110b, and A15:A0=DA01h. The XYZ bits become part of the device
|
| /linux-6.12.1/arch/arm/boot/dts/mediatek/ |
| D | mt8135.dtsi | 59 compatible = "arm,cortex-a15";
65 compatible = "arm,cortex-a15";
212 compatible = "arm,cortex-a15-gic";
|
| /linux-6.12.1/Documentation/devicetree/bindings/timer/ |
| D | arm,arch_timer.yaml | 25 - const: arm,cortex-a15-timer
119 compatible = "arm,cortex-a15-timer",
|
| /linux-6.12.1/arch/arm/boot/dts/broadcom/ |
| D | bcm63148.dtsi | 52 compatible = "arm,cortex-a15-pmu";
84 compatible = "arm,cortex-a15-gic";
|
| /linux-6.12.1/arch/arm/mach-exynos/ |
| D | mcpm-exynos.c | 71 * This assumes the cluster number of the big cores(Cortex A15) in exynos_cpu_powerup()
143 * On the Cortex-A15 we need to disable in exynos_cluster_cache_disable()
284 * On Exynos5420/5800 for the A15 and A7 clusters: in exynos_mcpm_init()
|
| /linux-6.12.1/Documentation/devicetree/bindings/arm/ |
| D | arm,vexpress-juno.yaml | 57 - description: Coretile Express A15x2 (V2P-CA15) has 2 Cortex A15 CPU
64 A15 CPU cores in a test chip on the core tile. This is the first test
70 - description: Coretile Express A15x2 A7x3 (V2P-CA15_A7) has 2 Cortex A15
|