Searched full:7000 (Results 1 – 25 of 358) sorted by relevance
12345678910>>...15
13 rtc0 = "/i2c@7000c000/rtc@68";14 rtc1 = "/i2c@7000d000/pmic@2d";15 rtc2 = "/rtc@7000e000";82 pwm@7000a000 {90 i2c@7000c000 {112 i2c@7000c500 {118 i2c@7000c700 {123 spi@7000d400 {129 spi@7000dc00 {
18 rtc0 = "/i2c@7000c000/rtc@68";19 rtc1 = "/i2c@7000d000/pmic@40";20 rtc2 = "/rtc@7000e000";76 pwm@7000a000 {84 i2c@7000c000 {106 i2c@7000c500 {115 i2c@7000c700 {120 spi@7000d400 {126 spi@7000da00 {
17 rtc0 = "/i2c@7000c000/rtc@68";18 rtc1 = "/i2c@7000d000/pmic@40";19 rtc2 = "/rtc@7000e000";75 pwm@7000a000 {83 i2c@7000c000 {102 i2c@7000c400 {110 i2c@7000c500 {118 spi@7000d400 {124 spi@7000da00 {
14 rtc0 = "/i2c@7000c000/rtc@68";15 rtc1 = "/i2c@7000d000/pmic@2d";16 rtc2 = "/rtc@7000e000";83 pwm@7000a000 {91 i2c@7000c000 {113 i2c@7000c500 {119 i2c@7000c700 {124 spi@7000d400 {130 spi@7000dc00 {
13 rtc0 = "/i2c@7000c000/rtc@68";14 rtc1 = "/i2c@7000d000/pmic@2d";15 rtc2 = "/rtc@7000e000";56 pwm@7000a000 {64 i2c@7000c000 {80 i2c@7000c700 {85 spi@7000d400 {
13 rtc0 = "/i2c@7000c000/rtc@68";14 rtc1 = "/i2c@7000d000/pmic@34";15 rtc2 = "/rtc@7000e000";120 pwm@7000a000 {128 i2c@7000c000 {144 i2c@7000c400 {149 spi@7000da00 {
359 pwm: pwm@7000a000 {369 i2c@7000c000 {384 i2c@7000c400 {399 i2c@7000c500 {414 i2c@7000c700 {429 i2c@7000d000 {444 spi@7000d400 {459 spi@7000d600 {474 spi@7000d800 {489 spi@7000da00 {[all …]
14 rtc0 = "/i2c@7000c500/rtc@56";15 rtc1 = "/rtc@7000e000";286 dvi_ddc: i2c@7000c000 {291 spi@7000c380 {302 hdmi_ddc: i2c@7000c400 {307 i2c@7000c500 {322 pmc@7000e400 {
9 rtc0 = "/i2c@7000d000/tps6586x@34";10 rtc1 = "/rtc@7000e000";296 i2c@7000c000 {301 i2c@7000c400 {306 i2c@7000d000 {449 pmc@7000e400 {494 i2c-parent = <&{/i2c@7000c400}>;
36 rtc0 = "/i2c@7000d000/tps65911@2d";37 rtc1 = "/rtc@7000e000";185 pwm@7000a000 {189 panelddc: i2c@7000c000 {194 i2c@7000c400 {199 i2c@7000c500 {220 i2c@7000c700 {225 i2c@7000d000 {378 spi@7000da00 {389 pmc@7000e400 {
8 rtc0 = "/i2c@7000d000/pmic@40";9 rtc1 = "/rtc@7000e000";78 pwm@7000a000 {82 i2c@7000c000 {103 i2c@7000c400 {116 i2c@7000c500 {126 hdmi_ddc: i2c@7000c700 {131 i2c@7000d000 {332 spi@7000d400 {375 spi@7000da00 {[all …]
530 pwm: pwm@7000a000 {540 i2c@7000c000 {556 spi@7000c380 {570 i2c2: i2c@7000c400 {586 i2c@7000c500 {602 i2c@7000d000 {618 spi@7000d400 {632 spi@7000d600 {646 spi@7000d800 {660 spi@7000da00 {[all …]
634 pwm: pwm@7000a000 {646 i2c@7000c000 {662 i2c@7000c400 {678 i2c@7000c500 {694 i2c@7000c700 {710 i2c@7000d000 {726 spi@7000d400 {742 spi@7000d600 {758 spi@7000d800 {774 spi@7000da00 {[all …]
12 rtc0 = "/i2c@7000d000/tps6586x@34";13 rtc1 = "/rtc@7000e000";332 pwm: pwm@7000a000 {336 i2c@7000c000 {370 i2c@7000c400 {375 i2c@7000c500 {380 i2c@7000d000 {514 kbc@7000e200 {654 pmc@7000e400 {665 memory-controller@7000f400 {[all …]
18 rtc0 = "/i2c@7000d000/tps6586x@34";19 rtc1 = "/rtc@7000e000";293 pwm: pwm@7000a000 {297 lvds_ddc: i2c@7000c000 {309 hdmi_ddc: i2c@7000c400 {314 i2c@7000c500 {329 i2c@7000d000 {480 pmc@7000e400 {491 memory-controller@7000f400 {
15 rtc0 = "/i2c@7000d000/tps6586x@34";16 rtc1 = "/rtc@7000e000";331 pwm: pwm@7000a000 {335 i2c@7000c000 {362 i2c@7000c400 {367 i2c@7000c500 {372 i2c@7000d000 {516 pmc@7000e400 {621 i2c-parent = <&{/i2c@7000c400}>;
40 regulator-ramp-delay = <7000>;49 regulator-ramp-delay = <7000>;58 regulator-ramp-delay = <7000>;67 regulator-ramp-delay = <7000>;
40 regulator-ramp-delay = <7000>;49 regulator-ramp-delay = <7000>;58 regulator-ramp-delay = <7000>;83 regulator-ramp-delay = <7000>;
9 rtc1 = "/rtc@7000e000";29 i2c@7000d000 {34 pmc@7000e400 {
11 rtc0 = "/i2c@7000d000/pmic@3c";12 rtc1 = "/rtc@7000e000";52 i2c@7000c400 {81 i2c@7000c500 {98 i2c@7000d000 {332 pmc@7000e400 {
36 enum: [7000, 12500]37 default: 700067 const: 7000
13 Xilinx boards with Zynq-7000 SOC or Zynq UltraScale+ MPSoC35 - const: xlnx,zynq-700040 - const: xlnx,zynq-700045 - const: xlnx,zynq-7000
154 regulator-ramp-delay = <7000>;163 regulator-ramp-delay = <7000>;172 regulator-ramp-delay = <7000>;197 regulator-ramp-delay = <7000>;
55 dev_t.t_avdasu = t_acsnh_advnh - 7000; in tusb_set_async_mode()60 dev_t.t_cez_r = 7000; in tusb_set_async_mode()84 dev_t.t_avdasu = t_scsnh_advnh - 7000; in tusb_set_sync_mode()89 dev_t.t_ce_rdyz = 7000; in tusb_set_sync_mode()