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/linux-6.12.1/tools/power/cpupower/bench/
DREADME-BENCH41 This part of the configuration file will create 25ms load/sleep turns,
48 Will increase load and sleep time by 25ms 5 times.
50 25ms load/sleep time repeated 20 times (cycles).
51 50ms load/sleep time repeated 20 times (cycles).
53 100ms load/sleep time repeated 20 times (cycles).
70 25 ms | 25 ms | 1
71 50 ms | 50 ms | 2
73 For example if ondemand governor is configured to have a 50ms
76 In round 1, ondemand should have rather static 50% load and probably
84 will always see 50% loads and you get worst performance impact never
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/linux-6.12.1/include/linux/usb/
Dpd.h232 #define PDO_FIXED_VOLT_SHIFT 10 /* 50mV units */
235 #define PDO_FIXED_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_FIXED_VOLT_SHIFT)
244 #define PDO_BATT_MAX_VOLT_SHIFT 20 /* 50mV units */
245 #define PDO_BATT_MIN_VOLT_SHIFT 10 /* 50mV units */
248 #define PDO_BATT_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MIN_VOLT_SHIFT)
249 #define PDO_BATT_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MAX_VOLT_SHIFT)
256 #define PDO_VAR_MAX_VOLT_SHIFT 20 /* 50mV units */
257 #define PDO_VAR_MIN_VOLT_SHIFT 10 /* 50mV units */
260 #define PDO_VAR_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MIN_VOLT_SHIFT)
261 #define PDO_VAR_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MAX_VOLT_SHIFT)
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/linux-6.12.1/Documentation/devicetree/bindings/sound/
Dcs35l33.txt31 20ms. If this property is set to 0,1,2,3 then ramp times would be 40ms,
32 60ms,100ms,175ms respectively for 48KHz sample rate.
62 stage enters LDO operation. Starts as a default value of 50mV for a value
63 of 1 and increases with a step size of 50mV to a maximum of 750mV (value of
72 from 0 to 7 for delays of 5ms, 10ms, 50ms, 100ms, 200ms, 500ms, 1000ms.
73 The default is 100ms.
91 1800mV with a step size of 50mV up to a maximum value of 1750mV.
Dcs35l36.txt15 increments of 50mV.
21 50mA.
61 (in ms) before the Class H algorithm switches to the weak-FET voltage
64 0 = 0ms
65 1 = 5ms
66 2 = 10ms
67 3 = 50ms
68 4 = 100ms (Default)
69 5 = 200ms
70 6 = 500ms
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Ddialog,da7219.yaml104 Mic bias higher voltage pulse duration (ms).
109 enum: [2, 5, 10, 50, 100, 200, 500]
111 Periodic button press measurements for 4-pole jack (ms).
121 enum: [5, 10, 20, 50, 100, 200, 500, 1000]
123 Debounce time for jack insertion (ms).
135 Jack type (3/4 pole) detection latency (ms).
141 Debounce time for jack removal (ms).
222 dlg,btn-cfg = <50>;
Ddmic-codec.yaml33 modeswitch-delay-ms:
34 description: Delay (in ms) to complete DMIC mode switch
36 wakeup-delay-ms:
37 description: Delay (in ms) after enabling the DMIC
52 wakeup-delay-ms = <50>;
53 modeswitch-delay-ms = <35>;
/linux-6.12.1/drivers/media/pci/saa7134/
Dsaa7134-input.c544 polling = 50; // ms in saa7134_input_init1()
551 polling = 50; // ms in saa7134_input_init1()
569 polling = 50; // ms in saa7134_input_init1()
591 polling = 50; // ms in saa7134_input_init1()
598 polling = 50; /* ms */ in saa7134_input_init1()
605 polling = 50; // ms in saa7134_input_init1()
612 polling = 50; /* ms */ in saa7134_input_init1()
632 polling = 50; /* ms */ in saa7134_input_init1()
638 polling = 50; // ms in saa7134_input_init1()
644 polling = 50; // ms in saa7134_input_init1()
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/linux-6.12.1/include/media/i2c/
Dlm3646.h61 * min 50ms, step 50ms, max 400ms
63 #define LM3646_FLASH_TOUT_MIN 50
64 #define LM3646_FLASH_TOUT_STEP 50
/linux-6.12.1/Documentation/scheduler/
Dsched-bwc.rst84 cpu.cfs_period_us=100ms
95 period is 1ms. There is also an upper bound on the period length of 1s.
120 /proc/sys/kernel/sched_cfs_bandwidth_slice_us (default=5ms)
163 Once a slice is assigned to a cpu it does not expire. However all but 1ms of
181 1ms per cpu or as defined by min_cfs_rq_runtime). This slight burst only
186 also limits the burst ability to no more than 1ms per cpu. This provides
199 will use up to 1ms additional quota in some periods, thereby preventing the
210 If period is 250ms and quota is also 250ms, the group will get
211 1 CPU worth of runtime every 250ms.
213 # echo 250000 > cpu.cfs_quota_us /* quota = 250ms */
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/linux-6.12.1/Documentation/admin-guide/device-mapper/
Ddelay.rst35 # Create mapped device named "delayed" delaying read, write and flush operations for 500ms.
42 # Create mapped device delaying write and flush operations for 400ms and
51 # Create mapped device delaying reads for 50ms, writes for 100ms and flushs for 333ms
54 dmsetup create delayed --table "0 `blockdev --getsz $1` delay $1 0 50 $2 0 100 $1 0 333"
/linux-6.12.1/drivers/media/rc/
Dnuvoton-cir.h131 /* select sample period as 50us */
317 /* MCE CIR controller signal length: about 43ms
318 * 43ms / 50us (sample period) * 0.85 (inaccuracy)
322 /* MCE CIR keyboard signal length: about 26ms
323 * 26ms / 50us (sample period) * 0.85 (inaccuracy)
328 /* MCE CIR mouse signal length: about 24ms
329 * 24ms / 50us (sample period) * 0.85 (inaccuracy)
333 #define CIR_SAMPLE_PERIOD 50
343 #define SAMPLE_PERIOD 50
/linux-6.12.1/Documentation/devicetree/bindings/mfd/
Dst,stmpe.yaml156 1 = 50 us
159 4 = 1 ms
160 5 = 5 ms
161 6 = 10 ms
162 7 = 50 ms
172 3 = 1 ms
173 4 = 5 ms
174 5 = 10 ms
175 6 = 50 ms
176 7 = 100 ms
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/linux-6.12.1/Documentation/translations/zh_CN/scheduler/
Dsched-bwc.rst78 cpu.cfs_period_us=100ms
104 /proc/sys/kernel/sched_cfs_bandwidth_slice_us (default=5ms)
174 # echo 250000 > cpu.cfs_quota_us /* quota = 250ms */
175 # echo 250000 > cpu.cfs_period_us /* period = 250ms */
181 # echo 1000000 > cpu.cfs_quota_us /* quota = 1000ms */
182 # echo 500000 > cpu.cfs_period_us /* period = 500ms */
190 # echo 10000 > cpu.cfs_quota_us /* quota = 10ms */
191 # echo 50000 > cpu.cfs_period_us /* period = 50ms */
200 # echo 20000 > cpu.cfs_quota_us /* quota = 20ms */
201 # echo 50000 > cpu.cfs_period_us /* period = 50ms */
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/linux-6.12.1/Documentation/fb/
Dviafb.modes15 # Sync Width 3.813 us 0.064 ms
17 # Front Porch 0.636 us 0.318 ms
19 # Back Porch 1.907 us 1.048 ms
21 # Active Time 25.422 us 15.253 ms
23 # Blank Time 6.356 us 1.430 ms
40 # Sync Width 2.032 us 0.080 ms
42 # Front Porch 0.508 us 0.027 ms
44 # Back Porch 3.810 us 0.427 ms
46 # Active Time 20.317 us 12.800 ms
48 # Blank Time 6.349 us 0.533 ms
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/linux-6.12.1/drivers/input/touchscreen/
Dstmpe-ts.c59 * (0 -> 10 us, 1 -> 50 us, 2 -> 100 us, 3 -> 500 us,
60 * 4-> 1 ms, 5 -> 5 ms, 6 -> 10 ms, 7 -> 50 ms)
63 * (0 -> 10 us, 1 -> 100 us, 2 -> 500 us, 3 -> 1 ms,
64 * 4 -> 5 ms, 5 -> 10 ms, 6 for 50 ms, 7 -> 100 ms)
70 * (0 -> 20 mA typical 35 mA max, 1 -> 50 mA typical 80 mA max)
112 * touch_det keeps coming in after 4ms, while the FIFO contains no value in stmpe_work()
169 schedule_delayed_work(&ts->work, msecs_to_jiffies(50)); in stmpe_ts_handler()
/linux-6.12.1/drivers/leds/trigger/
Dledtrig-activity.c73 /* We come here every 100ms in the worst case, so that's 100M ns of in led_activity_function()
100 * (typically 10ms every second, or 10ms ON, 990ms OFF). Then we want in led_activity_function()
102 * enough to saturate one core in multi-core systems or 50% in single in led_activity_function()
104 * cycle (10ms ON, 90ms OFF). After this point, the blinking frequency in led_activity_function()
106 * the activity, up to the point where we have 90ms ON, 10ms OFF when in led_activity_function()
112 * - a target CPU usage of min(50%, 100%/#CPU) for a 10% duty cycle in led_activity_function()
113 * (10ms ON, 90ms OFF) in led_activity_function()
122 * 100 ms and keep track of the sleep time left. This allows us to in led_activity_function()
135 target = (cpus > 1) ? (100 / cpus) : 50; in led_activity_function()
/linux-6.12.1/drivers/media/pci/bt8xx/
Dbttv-input.c201 /* Allow some timer jitter (RC5 is ~24ms anyway so this is ok) */ in bttv_rc5_timer_end()
432 ir->polling = 50; // ms in bttv_input_init()
440 ir->polling = 50; // ms in bttv_input_init()
447 ir->polling = 50; // ms in bttv_input_init()
455 ir->polling = 50; // ms in bttv_input_init()
472 ir->polling = 50; // ms in bttv_input_init()
481 ir->polling = 50; // ms in bttv_input_init()
491 ir->polling = 50; /* ms */ in bttv_input_init()
497 ir->polling = 50; /* ms */ in bttv_input_init()
503 ir->polling = 1; /* ms */ in bttv_input_init()
/linux-6.12.1/include/linux/iio/
Diio-gts-helper.h40 * An example could be a sensor allowing 50, 100, 200 and 400 mS times. The
41 * respective multiplication values could be 50 mS => 1, 100 mS => 2,
42 * 200 mS => 4 and 400 mS => 8 assuming the impact of integration time would be
43 * linear in a way that when collecting data for 50 mS caused value X, doubling
/linux-6.12.1/tools/testing/selftests/rseq/
Drun_param_test.sh109 echo "Yield injection (50%)"
118 echo "Kill injection (50%)"
124 echo "Sleep injection (1ms, 25%)"
127 echo "Sleep injection (1ms, 50%)"
130 echo "Sleep injection (1ms, 100%)"
/linux-6.12.1/sound/soc/codecs/
Dmax98373.c85 static DECLARE_TLV_DB_SCALE(max98373_digital_tlv, -6350, 50, 1);
87 0, 8, TLV_DB_SCALE_ITEM(0, 50, 0),
106 14, 15, TLV_DB_SCALE_ITEM(-100, 50, 0),
135 "45ms", "225ms", "450ms", "1150ms",
136 "2250ms", "3100ms", "4500ms", "6750ms"
145 "160us", "320us", "640us", "1.28ms",
146 "2.56ms", "5.12ms", "10.24ms", "20.48ms",
147 "40.96ms", "81.92ms", "16.384ms", "32.768ms"
156 "640us", "1.28ms", "2.56ms", "5.120ms",
157 "10.24ms", "20.48ms", "40.96ms", "81.92ms",
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/linux-6.12.1/drivers/media/pci/cx88/
Dcx88-input.c287 ir->polling = 50; /* ms */ in cx88_ir_init()
316 ir->polling = 50; /* ms */ in cx88_ir_init()
327 ir->polling = 1; /* ms */ in cx88_ir_init()
334 ir->polling = 5; /* ms */ in cx88_ir_init()
349 ir->polling = 10; /* ms */ in cx88_ir_init()
358 ir->polling = 1; /* ms */ in cx88_ir_init()
365 ir->polling = 1; /* ms */ in cx88_ir_init()
372 ir->polling = 50; /* ms */ in cx88_ir_init()
379 ir->polling = 1; /* ms */ in cx88_ir_init()
387 ir->polling = 50; /* ms */ in cx88_ir_init()
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/linux-6.12.1/drivers/phy/intel/
Dphy-intel-lgm-emmc.c104 0, 50); in intel_emmc_phy_power()
128 * our source clock is at 50 MHz and that lock time scales linearly in intel_emmc_phy_power()
130 * is super slow (like 100 kHZ) this could take as long as 5.1 ms as in intel_emmc_phy_power()
131 * per the math: 10.2 us * (50000000 Hz / 100000 Hz) => 5.1 ms in intel_emmc_phy_power()
137 * extreme cases we've seen it take up to over 10ms (!). We'll be in intel_emmc_phy_power()
138 * generous and give it 50ms. in intel_emmc_phy_power()
143 0, 50 * USEC_PER_MSEC); in intel_emmc_phy_power()
192 /* Drive impedance: 50 Ohm */ in intel_emmc_phy_power_on()
196 dev_err(&phy->dev, "ERROR set drive-impednce-50ohm: %d\n", ret); in intel_emmc_phy_power_on()
/linux-6.12.1/Documentation/tools/rtla/
Drtla-timerlat-hist.rst39 *SCHED_DEADLINE* priority, with a *100us* runtime every *1ms* period. The
40 *1ms* period is also passed to the *timerlat* tracer. Auto-analysis is disabled
43 [root@alien ~]# timerlat hist -d 10m -c 0-4 -P d:100us:1ms -p 1000 --no-aa
60 …12 4 256 2 360 50 411 64 474 3 …
66 …18 0 8 0 17 2 50 6 56 0 …
92 …50 0 0 0 0 0 0 0 0 0 …
99 … 16 36 15 58 24 44 21 46 13 50
/linux-6.12.1/drivers/video/fbdev/via/
Dvt1636.c16 /* T1: VDD on - Data on. Each increment is 1 ms. (50ms = 031h) */
18 /* T2: Data on - Backlight on. Each increment is 2 ms. (210ms = 068h) */
20 /* T3: Backlight off -Data off. Each increment is 2 ms. (210ms = 068h)*/
22 /* T4: Data off - VDD off. Each increment is 1 ms. (50ms = 031h) */
24 /* T5: VDD off - VDD on. Each increment is 100 ms. (500ms = 04h) */
/linux-6.12.1/drivers/iio/light/
Dnoa1305.c48 100, 8 * 77, /* 800 ms */
49 100, 4 * 77, /* 400 ms */
50 100, 2 * 77, /* 200 ms */
51 100, 1 * 77, /* 100 ms */
52 1000, 5 * 77, /* 50 ms */
53 10000, 25 * 77, /* 25 ms */
54 100000, 125 * 77, /* 12.5 ms */
55 1000000, 625 * 77, /* 6.25 ms */
59 0, 800000, /* 800 ms */
60 0, 400000, /* 400 ms */
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