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/linux-6.12.1/arch/xtensa/variants/test_kc705_hifi/include/variant/
Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2014 Tensilica Inc.
36 #define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */
44 #define XCHAL_CP1_SA_ALIGN 8 /* min alignment of save area */
66 /* Save area for non-coprocessor optional and custom (TIE) state: */
71 #define XCHAL_TOTAL_SA_SIZE 240 /* with 16-byte align padding */
72 #define XCHAL_TOTAL_SA_ALIGN 8 /* actual minimum alignment */
84 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
90 * asize = allocated size in bytes (asize*8 == bitsz + gapsz + padsz)
92 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
[all …]
/linux-6.12.1/drivers/mtd/nand/raw/
Dnand_ids.c1 // SPDX-License-Identifier: GPL-2.0-only
29 {"TC58NVG0S3E 1G 3.3V 8-bit",
31 SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512), },
32 {"TC58NVG2S0F 4G 3.3V 8-bit",
34 SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) },
35 {"TC58NVG2S0H 4G 3.3V 8-bit",
37 SZ_4K, SZ_512, SZ_256K, 0, 8, 256, NAND_ECC_INFO(8, SZ_512) },
38 {"TC58NVG3S0F 8G 3.3V 8-bit",
40 SZ_4K, SZ_1K, SZ_256K, 0, 8, 232, NAND_ECC_INFO(4, SZ_512) },
41 {"TC58NVG5D2 32G 3.3V 8-bit",
[all …]
/linux-6.12.1/tools/testing/selftests/powerpc/lib/
Dreg.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
7 #include <ppc-asm.h>
11 /* Non volatile GPR - unsigned long buf[18] */
13 ld 14, 0*8(3)
14 ld 15, 1*8(3)
15 ld 16, 2*8(3)
16 ld 17, 3*8(3)
17 ld 18, 4*8(3)
18 ld 19, 5*8(3)
19 ld 20, 6*8(3)
[all …]
/linux-6.12.1/tools/perf/arch/powerpc/tests/
Dregs_load.S1 /* SPDX-License-Identifier: GPL-2.0 */
6 #define R1 1 * 8
7 #define R2 2 * 8
8 #define R3 3 * 8
9 #define R4 4 * 8
10 #define R5 5 * 8
11 #define R6 6 * 8
12 #define R7 7 * 8
13 #define R8 8 * 8
14 #define R9 9 * 8
[all …]
/linux-6.12.1/arch/xtensa/variants/test_kc705_be/include/variant/
Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
36 #define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */
44 #define XCHAL_CP1_SA_ALIGN 8 /* min alignment of save area */
66 /* Save area for non-coprocessor optional and custom (TIE) state: */
71 #define XCHAL_TOTAL_SA_SIZE 160 /* with 16-byte align padding */
72 #define XCHAL_TOTAL_SA_ALIGN 8 /* actual minimum alignment */
84 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
90 * asize = allocated size in bytes (asize*8 == bitsz + gapsz + padsz)
92 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
[all …]
/linux-6.12.1/drivers/media/test-drivers/vicodec/
Dcodec-fwht.c1 // SPDX-License-Identifier: LGPL-2.1+
6 * 8x8 Fast Walsh Hadamard Transform in sequency order based on the paper:
8 * A Recursive Algorithm for Sequency-Ordered Fast Walsh Transforms,
15 #include "codec-fwht.h"
21 * be guaranteed that the magic 8 byte sequence (see below) can
34 1, 8,
36 3, 10, 17, 24,
57 s16 block[8 * 8]; in rlc()
67 for (y = 0; y < 8; y++) { in rlc()
68 for (x = 0; x < 8; x++) { in rlc()
[all …]
/linux-6.12.1/Documentation/driver-api/media/drivers/ccs/
Dccs-regs.asc1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause
2 # Copyright (C) 2019--2020 Intel Corporation
5 # - f field LSB MSB rflags
6 # - e enum value # after a field
7 # - e enum value [LSB MSB]
8 # - b bool bit
9 # - l arg name min max elsize [discontig...]
12 # 8, 16, 32 register bits (default is 8)
20 module_revision_number_major 0x0002 8
21 frame_count 0x0005 8
[all …]
/linux-6.12.1/drivers/gpu/drm/display/
Ddrm_dsc_helper.c1 // SPDX-License-Identifier: MIT
35 * drm_dsc_dp_pps_header_init() - Initializes the PPS Header
49 pps_header->HB1 = DP_SDP_PPS; in drm_dsc_dp_pps_header_init()
50 pps_header->HB2 = DP_SDP_PPS_HEADER_PAYLOAD_BYTES_MINUS_1; in drm_dsc_dp_pps_header_init()
55 * drm_dsc_dp_rc_buffer_size - get rc buffer size in bytes
57 * @rc_buffer_size: number of blocks - 1, according to DPCD offset 63h
82 * drm_dsc_pps_payload_pack() - Populates the DSC PPS
110 pps_payload->dsc_version = in drm_dsc_pps_payload_pack()
111 dsc_cfg->dsc_version_minor | in drm_dsc_pps_payload_pack()
112 dsc_cfg->dsc_version_major << DSC_PPS_VERSION_MAJOR_SHIFT; in drm_dsc_pps_payload_pack()
[all …]
/linux-6.12.1/drivers/gpu/drm/i915/display/
Dintel_qp_tables.c1 // SPDX-License-Identifier: MIT
43 { 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
45 { 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
47 { 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1,
49 { 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1,
51 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1,
53 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2,
55 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2,
57 { 6, 5, 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
58 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0 },
[all …]
/linux-6.12.1/Documentation/admin-guide/media/
Ddvb_intro.rst1 .. SPDX-License-Identifier: GPL-2.0
12 structure of DVB-T cards are substantially similar to Analogue TV cards,
30 embedded within the modulated composite analogue signal -
38 signal encoded at a resolution of 768x576 24-bit color pixels over 25
39 frames per second - a fair amount of data is generated and must be
43 encoded and compressed form - similar to the form that is used in
46 The purpose of a simple budget digital TV card (DVB-T,C or S) is to
96 On this example, we're considering tuning into DVB-T channels in
115 The digital TV Scan utilities (like dvbv5-scan) have use a set of
116 compiled-in defaults for various countries and regions. Those are
[all …]
/linux-6.12.1/include/asm-generic/
Dxor.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/asm-generic/xor.h
5 * Generic optimized RAID-5 checksumming functions.
14 long lines = bytes / (sizeof (long)) / 8; in xor_8regs_2()
20 p1[3] ^= p2[3]; in xor_8regs_2()
25 p1 += 8; in xor_8regs_2()
26 p2 += 8; in xor_8regs_2()
27 } while (--lines > 0); in xor_8regs_2()
35 long lines = bytes / (sizeof (long)) / 8; in xor_8regs_3()
41 p1[3] ^= p2[3] ^ p3[3]; in xor_8regs_3()
[all …]
/linux-6.12.1/tools/testing/selftests/powerpc/copyloops/
Dcopyuser_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 #include <asm/asm-compat.h>
9 #include <asm/feature-fixups.h>
17 #define sLd sld /* Shift towards low-numbered address. */
18 #define sHd srd /* Shift towards high-numbered address. */
20 #define sLd srd /* Shift towards low-numbered address. */
21 #define sHd sld /* Shift towards high-numbered address. */
39 100: EX_TABLE(100b, .Lld_exc - r3_offset)
43 100: EX_TABLE(100b, .Lst_exc - r3_offset)
60 neg r6,r3 /* LS 3 bits = # bytes to 8-byte dest bdry */
[all …]
Dmemcpy_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 #include <asm/asm-compat.h>
9 #include <asm/feature-fixups.h>
13 /* For big-endian, 0 == most CPUs, 1 == POWER6, 2 == Cell */
23 std r3,-STACKFRAMESIZE+STK_REG(R31)(r1) /* save destination pointer for return value */
31 /* dumb little-endian memcpy that will get replaced at runtime */
32 addi r9,r3,-1
33 addi r4,r4,-1
43 neg r6,r3 # LS 3 bits = # bytes to 8-byte dest bdry
60 addi r3,r3,-16
[all …]
/linux-6.12.1/arch/powerpc/lib/
Dcopyuser_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 #include <asm/asm-compat.h>
9 #include <asm/feature-fixups.h>
17 #define sLd sld /* Shift towards low-numbered address. */
18 #define sHd srd /* Shift towards high-numbered address. */
20 #define sLd srd /* Shift towards low-numbered address. */
21 #define sHd sld /* Shift towards high-numbered address. */
39 100: EX_TABLE(100b, .Lld_exc - r3_offset)
43 100: EX_TABLE(100b, .Lst_exc - r3_offset)
60 neg r6,r3 /* LS 3 bits = # bytes to 8-byte dest bdry */
[all …]
Dmemcpy_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 #include <asm/asm-compat.h>
9 #include <asm/feature-fixups.h>
13 /* For big-endian, 0 == most CPUs, 1 == POWER6, 2 == Cell */
23 std r3,-STACKFRAMESIZE+STK_REG(R31)(r1) /* save destination pointer for return value */
31 /* dumb little-endian memcpy that will get replaced at runtime */
32 addi r9,r3,-1
33 addi r4,r4,-1
43 neg r6,r3 # LS 3 bits = # bytes to 8-byte dest bdry
60 addi r3,r3,-16
[all …]
/linux-6.12.1/arch/arm64/include/asm/
Dsysreg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include <linux/kasan-tags.h>
16 #include <asm/gpr-num.h>
22 * [20-19] : Op0
23 * [18-16] : Op1
24 * [15-12] : CRn
25 * [11-8] : CRm
26 * [7-5] : Op2
34 #define CRm_shift 8
68 (((x) << 8) & 0x00ff0000) | \
[all …]
/linux-6.12.1/arch/powerpc/crypto/
Daes-spe-core.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
14 #include "aes-spe-regs.h"
17 rlwimi rT0,in,28-((bpos+3)%4)*8,20,27;
20 rlwimi rT1,in,24-((bpos+3)%4)*8,24,31;
41 LBZ(out, rT0, 8)
44 LBZ(out, rT0, 8) /* load enc byte */
56 * via bl/blr. It expects that caller has pre-xored input data with first
57 * 4 words of encryption key into rD0-rD3. Pointer/counter registers must
58 * have also been set up before (rT0, rKP, CTR). Output is stored in rD0-rD3
59 * and rW0-rW3 and caller must execute a final xor on the output registers.
[all …]
/linux-6.12.1/drivers/pinctrl/sunplus/
Dsppctl_sp7021.c1 // SPDX-License-Identifier: GPL-2.0
14 #define D(x, y) ((x) * 8 + (y))
18 D_PIS(0, 0), D_PIS(0, 1), D_PIS(0, 2), D_PIS(0, 3),
20 D_PIS(1, 0), D_PIS(1, 1), D_PIS(1, 2), D_PIS(1, 3),
22 D_PIS(2, 0), D_PIS(2, 1), D_PIS(2, 2), D_PIS(2, 3),
24 D_PIS(3, 0), D_PIS(3, 1), D_PIS(3, 2), D_PIS(3, 3),
25 D_PIS(3, 4), D_PIS(3, 5), D_PIS(3, 6), D_PIS(3, 7),
26 D_PIS(4, 0), D_PIS(4, 1), D_PIS(4, 2), D_PIS(4, 3),
28 D_PIS(5, 0), D_PIS(5, 1), D_PIS(5, 2), D_PIS(5, 3),
30 D_PIS(6, 0), D_PIS(6, 1), D_PIS(6, 2), D_PIS(6, 3),
[all …]
/linux-6.12.1/arch/arc/include/asm/
Darcregs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
16 #define ARC_REG_FP_BCR 0x6B /* ARCompact: Single-Precision FPU */
63 * ECR: Exception Cause Reg bits-n-pieces
65 * [15: 8] = Exception Cause Code
101 #define ECR_C_BIT_DTLB_LD_MISS 8
106 #define AUX_EXEC_CTRL 8
112 * Status regs are read-only (build-time) so need not be saved/restored
122 * DSP-related registers
154 #define PAGES_TO_KB(n_pages) ((n_pages) << (PAGE_SHIFT - 10))
[all …]
/linux-6.12.1/drivers/pinctrl/mediatek/
Dpinctrl-mt8183.c1 // SPDX-License-Identifier: GPL-2.0
9 #include "pinctrl-mtk-mt8183.h"
10 #include "pinctrl-paris.h"
14 * iocfg[3]:0x11E70000, iocfg[4]:0x11E90000, iocfg[5]:0x11D30000,
15 * iocfg[6]:0x11D20000, iocfg[7]:0x11C50000, iocfg[8]:0x11F30000.
44 PINS_FIELD_BASE(0, 3, 6, 0x000, 0x10, 3, 1),
46 PIN_FIELD_BASE(8, 8, 6, 0x000, 0x10, 0, 1),
48 PIN_FIELD_BASE(11, 11, 1, 0x000, 0x10, 3, 1),
51 PINS_FIELD_BASE(17, 20, 2, 0x000, 0x10, 3, 1),
56 PINS_FIELD_BASE(31, 31, 2, 0x000, 0x10, 8, 1),
[all …]
/linux-6.12.1/drivers/gpu/drm/omapdrm/dss/
Ddispc_coefs.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
12 static const struct dispc_coef coef3_M8[8] = {
14 { 0, -4, 123, 9, 0 },
15 { 0, -4, 108, 24, 0 },
16 { 0, -2, 87, 43, 0 },
18 { 0, 43, 87, -2, 0 },
19 { 0, 24, 108, -4, 0 },
20 { 0, 9, 123, -4, 0 },
23 static const struct dispc_coef coef3_M9[8] = {
[all …]
/linux-6.12.1/drivers/video/fbdev/omap2/omapfb/dss/
Ddispc_coefs.c1 // SPDX-License-Identifier: GPL-2.0-only
14 static const struct dispc_coef coef3_M8[8] = {
16 { 0, -4, 123, 9, 0 },
17 { 0, -4, 108, 24, 0 },
18 { 0, -2, 87, 43, 0 },
20 { 0, 43, 87, -2, 0 },
21 { 0, 24, 108, -4, 0 },
22 { 0, 9, 123, -4, 0 },
25 static const struct dispc_coef coef3_M9[8] = {
28 { 0, -2, 100, 30, 0 },
[all …]
/linux-6.12.1/drivers/staging/media/ipu3/
Dipu3-tables.c1 // SPDX-License-Identifier: GPL-2.0
4 #include "ipu3-tables.h"
24 .even = { { 0, 3, 122, 7, 3, 0, 0 },
25 { 0, 0, 122, 7, 7, -1, 0 },
26 { 0, -3, 122, 7, 10, -1, 0 },
27 { 0, -5, 121, 7, 14, -2, 0 },
28 { 0, -7, 120, 7, 18, -3, 0 },
29 { 0, -9, 118, 7, 23, -4, 0 },
30 { 0, -11, 116, 7, 27, -4, 0 },
31 { 0, -12, 113, 7, 32, -5, 0 },
[all …]
/linux-6.12.1/tools/testing/selftests/bpf/verifier/
Datomic_cmpxchg.c2 "atomic compare-and-exchange smoketest - 64bit",
4 /* val = 3; */
5 BPF_ST_MEM(BPF_DW, BPF_REG_10, -8, 3),
9 BPF_ATOMIC_OP(BPF_DW, BPF_CMPXCHG, BPF_REG_10, BPF_REG_1, -8),
10 /* if (old != 3) exit(2); */
11 BPF_JMP_IMM(BPF_JEQ, BPF_REG_0, 3, 2),
14 /* if (val != 3) exit(3); */
15 BPF_LDX_MEM(BPF_DW, BPF_REG_0, BPF_REG_10, -8),
16 BPF_JMP_IMM(BPF_JEQ, BPF_REG_0, 3, 2),
17 BPF_MOV64_IMM(BPF_REG_0, 3),
[all …]
/linux-6.12.1/arch/arm/boot/dts/nxp/imx/
Dimx6ul-pinfunc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright 2014 - 2015 Freescale Semiconductor, Inc.
30 #define MX6UL_PAD_JTAG_MOD__ENET1_REF_CLK_25M 0x0044 0x02d0 0x0000 3 0
37 #define MX6UL_PAD_JTAG_TMS__CCM_CLKO1 0x0048 0x02d4 0x0000 3 0
41 #define MX6UL_PAD_JTAG_TMS__EPIT1_OUT 0x0048 0x02d4 0x0000 8 0
45 #define MX6UL_PAD_JTAG_TDO__CCM_CLKO2 0x004c 0x02d8 0x0000 3 0
49 #define MX6UL_PAD_JTAG_TDO__EPIT2_OUT 0x004c 0x02d8 0x0000 8 0
56 #define MX6UL_PAD_JTAG_TDI__SIM1_POWER_FAIL 0x0050 0x02dc 0x0000 8 0
63 #define MX6UL_PAD_JTAG_TCK__SIM2_POWER_FAIL 0x0054 0x02e0 0x0000 8 0
70 #define MX6UL_PAD_JTAG_TRST_B__CAAM_RNG_OSC_OBS 0x0058 0x02e4 0x0000 8 0
[all …]

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