| /linux-6.12.1/tools/testing/selftests/powerpc/lib/ |
| D | reg.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
7 #include <ppc-asm.h>
11 /* Non volatile GPR - unsigned long buf[18] */
13 ld 14, 0*8(3)
14 ld 15, 1*8(3)
15 ld 16, 2*8(3)
16 ld 17, 3*8(3)
17 ld 18, 4*8(3)
18 ld 19, 5*8(3)
19 ld 20, 6*8(3)
[all …]
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| /linux-6.12.1/arch/arm64/include/asm/ |
| D | sysreg.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include <linux/kasan-tags.h>
16 #include <asm/gpr-num.h>
22 * [20-19] : Op0
23 * [18-16] : Op1
24 * [15-12] : CRn
25 * [11-8] : CRm
26 * [7-5] : Op2
83 * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints,
86 * Op0 = 0, CRn = 4
[all …]
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| /linux-6.12.1/arch/xtensa/variants/test_kc705_be/include/variant/ |
| D | tie.h | 2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
66 /* Save area for non-coprocessor optional and custom (TIE) state: */
68 #define XCHAL_NCP_SA_ALIGN 4
71 #define XCHAL_TOTAL_SA_SIZE 160 /* with 16-byte align padding */
84 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
92 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
94 * regnum = reg index in regfile, or special/TIE-user reg number
101 * To filter out certain registers, e.g. to expand only the non-global
116 XCHAL_SA_REG(s,1,2,1,1, threadptr, 4, 4, 4,0x03E7, ur,231, 32,0,0,0) \
[all …]
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| /linux-6.12.1/arch/arc/include/asm/ |
| D | uaccess.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
6 * -__clear_user( ) called multiple times during elf load was byte loop
10 * -Hand crafted constant propagation for "constant" copy sizes
11 * -stock kernel shrunk by 33K at -O3
14 * -Added option to (UN)inline copy_(to|from)_user to reduce code sz
15 * -kernel shrunk by 200K even at -O3 (gcc 4.2.1)
16 * -Enabled when doing -Os
34 case 4: __arc_get_user_one(*(k), u, "ld", __ret); break; \
41 * Returns 0 on success, -EFAULT if not.
[all …]
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| /linux-6.12.1/arch/arm64/boot/dts/rockchip/ |
| D | rk3568-pinctrl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include "rockchip-pinconf.dtsi"
15 /omit-if-no-ref/
16 acodec_pins: acodec-pins {
36 /omit-if-no-ref/
37 audiopwm_lout: audiopwm-lout {
40 <1 RK_PA0 4 &pcfg_pull_none>;
43 /omit-if-no-ref/
44 audiopwm_loutn: audiopwm-loutn {
[all …]
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| /linux-6.12.1/arch/xtensa/variants/test_kc705_hifi/include/variant/ |
| D | tie.h | 2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2014 Tensilica Inc.
66 /* Save area for non-coprocessor optional and custom (TIE) state: */
68 #define XCHAL_NCP_SA_ALIGN 4
71 #define XCHAL_TOTAL_SA_SIZE 240 /* with 16-byte align padding */
84 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
92 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
94 * regnum = reg index in regfile, or special/TIE-user reg number
101 * To filter out certain registers, e.g. to expand only the non-global
116 XCHAL_SA_REG(s,1,2,1,1, threadptr, 4, 4, 4,0x03E7, ur,231, 32,0,0,0) \
[all …]
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| /linux-6.12.1/arch/xtensa/variants/csp/include/variant/ |
| D | tie.h | 2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
63 /* Save area for non-coprocessor optional and custom (TIE) state: */
65 #define XCHAL_NCP_SA_ALIGN 4
68 #define XCHAL_TOTAL_SA_SIZE 48 /* with 16-byte align padding */
69 #define XCHAL_TOTAL_SA_ALIGN 4 /* actual minimum alignment */
81 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
89 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
91 * regnum = reg index in regfile, or special/TIE-user reg number
98 * To filter out certain registers, e.g. to expand only the non-global
[all …]
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| /linux-6.12.1/tools/arch/arm64/include/asm/ |
| D | sysreg.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
15 #include <asm/gpr-num.h>
21 * [20-19] : Op0
22 * [18-16] : Op1
23 * [15-12] : CRn
24 * [11-8] : CRm
25 * [7-5] : Op2
82 * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints,
85 * Op0 = 0, CRn = 4
94 #define PSTATE_PAN pstate_field(0, 4)
[all …]
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| /linux-6.12.1/include/dt-bindings/pinctrl/ |
| D | pads-imx8dxl.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
13 #define IMX8DXL_COMP_CTL_GPIO_1V8_3V3_PCIESEP 3
14 #define IMX8DXL_USB_SS3_TC0 4
149 … IMX8DXL_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 IMX8DXL_PCIE_CTRL0_PERST_B 4
152 … IMX8DXL_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 IMX8DXL_PCIE_CTRL0_CLKREQ_B 4
155 … IMX8DXL_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 IMX8DXL_PCIE_CTRL0_WAKE_B 4
160 … IMX8DXL_USB_SS3_TC0_LSIO_GPIO4_IO03 IMX8DXL_USB_SS3_TC0 4
164 … IMX8DXL_USB_SS3_TC1_LSIO_GPIO4_IO04 IMX8DXL_USB_SS3_TC1 4
169 … IMX8DXL_USB_SS3_TC2_LSIO_GPIO4_IO05 IMX8DXL_USB_SS3_TC2 4
173 … IMX8DXL_USB_SS3_TC3_LSIO_GPIO4_IO06 IMX8DXL_USB_SS3_TC3 4
[all …]
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| D | pads-imx8qxp.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
14 #define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_PCIESEP 3
15 #define IMX8QXP_USB_SS3_TC0 4
190 … IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 IMX8QXP_PCIE_CTRL0_PERST_B 4
192 … IMX8QXP_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 IMX8QXP_PCIE_CTRL0_CLKREQ_B 4
194 … IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 IMX8QXP_PCIE_CTRL0_WAKE_B 4
198 … IMX8QXP_USB_SS3_TC0_LSIO_GPIO4_IO03 IMX8QXP_USB_SS3_TC0 4
201 … IMX8QXP_USB_SS3_TC1_LSIO_GPIO4_IO04 IMX8QXP_USB_SS3_TC1 4
205 … IMX8QXP_USB_SS3_TC2_LSIO_GPIO4_IO05 IMX8QXP_USB_SS3_TC2 4
208 … IMX8QXP_USB_SS3_TC3_LSIO_GPIO4_IO06 IMX8QXP_USB_SS3_TC3 4
[all …]
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| /linux-6.12.1/Documentation/input/devices/ |
| D | elantech.rst | 4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
17 3. Differentiating hardware versions
18 4. Hardware version 1
20 4.2 Native relative mode 4 byte packet format
21 4.3 Native absolute mode 4 byte packet format
25 5.2.1 Parity checking and packet re-synchronization
27 5.2.3 Two finger touch
28 6. Hardware version 3
33 7. Hardware version 4
38 7.2.3 Motion packet
[all …]
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| /linux-6.12.1/arch/powerpc/boot/ |
| D | string.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
13 addi r5,r3,-1
14 addi r4,r4,-1
26 addi r6,r3,-1
27 addi r4,r4,-1
36 addi r5,r3,-1
37 addi r4,r4,-1
41 addi r5,r5,-1
50 addi r3,r3,-1
61 addi r5,r3,-1
[all …]
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| /linux-6.12.1/sound/soc/codecs/ |
| D | sma1303.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * sma1303.h -- sma1303 ALSA SoC Audio driver
27 #define SMA1303_I2C_RETRY_COUNT 3
122 #define SMA1303_I2S_MODE_MASK (7<<4)
123 #define SMA1303_STANDARD_I2S (0<<4)
124 #define SMA1303_LJ (1<<4)
125 #define SMA1303_RJ_16BIT (4<<4)
126 #define SMA1303_RJ_18BIT (5<<4)
127 #define SMA1303_RJ_20BIT (6<<4)
128 #define SMA1303_RJ_24BIT (7<<4)
[all …]
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| /linux-6.12.1/arch/xtensa/variants/de212/include/variant/ |
| D | tie.h | 2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
40 /* Save area for non-coprocessor optional and custom (TIE) state: */
42 #define XCHAL_NCP_SA_ALIGN 4
45 #define XCHAL_TOTAL_SA_SIZE 32 /* with 16-byte align padding */
46 #define XCHAL_TOTAL_SA_ALIGN 4 /* actual minimum alignment */
58 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
66 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
68 * regnum = reg index in regfile, or special/TIE-user reg number
75 * To filter out certain registers, e.g. to expand only the non-global
[all …]
|
| /linux-6.12.1/Documentation/userspace-api/media/v4l/ |
| D | pixfmt-rgb.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _pixfmt-rgb:
22 (including capture queues of mem-to-mem devices) fill the alpha component in
25 but can set the alpha bit to a user-configurable value, the
26 :ref:`V4L2_CID_ALPHA_COMPONENT <v4l2-alpha-component>` control is used to
31 :ref:`Output <output>` devices (including output queues of mem-to-mem devices
44 - In all the tables that follow, bit 7 is the most significant bit in a byte.
45 - 'r', 'g' and 'b' denote bits of the red, green and blue components
54 based on the order of the RGB components as seen in a 8-, 16- or 32-bit word,
56 noted by the presence of bit 31 in the 4CC value), and on the number of bits
[all …]
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| /linux-6.12.1/drivers/gpu/drm/i915/display/ |
| D | intel_qp_tables.c | 1 // SPDX-License-Identifier: MIT
24 /* from BPP 4 to 12 in steps of 0.5 */
27 /* from BPP 4 to 15 in steps of 0.5 */
30 /* from BPP 4 to 18 in steps of 0.5 */
43 { 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
45 { 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
47 { 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1,
49 { 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1,
51 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1,
53 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2,
[all …]
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| /linux-6.12.1/arch/arm64/crypto/ |
| D | sha512-ce-core.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * sha512-ce-core.S - core SHA-384/SHA-512 transform using v8 Crypto Extensions
15 .irp b,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19
37 * The SHA-512 round constants
40 .align 4
111 ld1 {v8.2d-v11.2d}, [x0]
113 /* load first 4 round constants */
115 ld1 {v20.2d-v23.2d}, [x3], #64
118 0: ld1 {v12.2d-v15.2d}, [x1], #64
119 ld1 {v16.2d-v19.2d}, [x1], #64
[all …]
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| /linux-6.12.1/tools/testing/selftests/cgroup/ |
| D | test_cpuset_prs.sh | 2 # SPDX-License-Identifier: GPL-2.0
13 exit 4 # ksft_skip
16 [[ $(id -u) -eq 0 ]] || skip_test "Test must be run as root!"
23 CGROUP2=$(mount -t cgroup2 | head -1 | awk -e '{print $3}')
24 [[ -n "$CGROUP2" ]] || skip_test "Cgroup v2 mount point not found!"
28 NR_CPUS=$(lscpu | grep "^CPU(s):" | sed -e "s/.*:[[:space:]]*//")
29 [[ $NR_CPUS -lt 8 ]] && skip_test "Test needs at least 8 cpus available!"
32 if [[ -c /dev/console && -w /dev/console ]]
44 while [[ "$1" = -* ]]
47 -v) ((VERBOSE++))
[all …]
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| /linux-6.12.1/lib/zstd/compress/ |
| D | clevels.h | 5 * This source code is licensed under both the BSD-style license (found in the
8 * You may select, at your option, one of the above-listed licenses.
17 /*-===== Pre-defined compression levels =====-*/
23 static const ZSTD_compressionParameters ZSTD_defaultCParameters[4][ZSTD_MAX_CLEVEL+1] = {
24 { /* "default" - for any srcSize > 256 KB */
29 { 21, 16, 17, 1, 5, 0, ZSTD_dfast }, /* level 3 */
30 { 21, 18, 18, 1, 5, 0, ZSTD_dfast }, /* level 4 */
31 { 21, 18, 19, 3, 5, 2, ZSTD_greedy }, /* level 5 */
32 { 21, 18, 19, 3, 5, 4, ZSTD_lazy }, /* level 6 */
33 { 21, 19, 20, 4, 5, 8, ZSTD_lazy }, /* level 7 */
[all …]
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| /linux-6.12.1/tools/testing/selftests/powerpc/copyloops/ |
| D | copyuser_64.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 #include <asm/asm-compat.h>
9 #include <asm/feature-fixups.h>
17 #define sLd sld /* Shift towards low-numbered address. */
18 #define sHd srd /* Shift towards high-numbered address. */
20 #define sLd srd /* Shift towards low-numbered address. */
21 #define sHd sld /* Shift towards high-numbered address. */
39 100: EX_TABLE(100b, .Lld_exc - r3_offset)
43 100: EX_TABLE(100b, .Lst_exc - r3_offset)
56 /* first check for a 4kB copy on a 4kB boundary */
[all …]
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| /linux-6.12.1/arch/powerpc/lib/ |
| D | copyuser_64.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 #include <asm/asm-compat.h>
9 #include <asm/feature-fixups.h>
17 #define sLd sld /* Shift towards low-numbered address. */
18 #define sHd srd /* Shift towards high-numbered address. */
20 #define sLd srd /* Shift towards low-numbered address. */
21 #define sHd sld /* Shift towards high-numbered address. */
39 100: EX_TABLE(100b, .Lld_exc - r3_offset)
43 100: EX_TABLE(100b, .Lst_exc - r3_offset)
56 /* first check for a 4kB copy on a 4kB boundary */
[all …]
|
| /linux-6.12.1/drivers/media/test-drivers/vicodec/ |
| D | codec-v4l2-fwht.c | 1 // SPDX-License-Identifier: LGPL-2.1
11 #include "codec-v4l2-fwht.h"
14 { V4L2_PIX_FMT_YUV420, 1, 3, 2, 1, 1, 2, 2, 3, 3, V4L2_FWHT_FL_PIXENC_YUV},
15 { V4L2_PIX_FMT_YVU420, 1, 3, 2, 1, 1, 2, 2, 3, 3, V4L2_FWHT_FL_PIXENC_YUV},
16 { V4L2_PIX_FMT_YUV422P, 1, 2, 1, 1, 1, 2, 1, 3, 3, V4L2_FWHT_FL_PIXENC_YUV},
17 { V4L2_PIX_FMT_NV12, 1, 3, 2, 1, 2, 2, 2, 3, 2, V4L2_FWHT_FL_PIXENC_YUV},
18 { V4L2_PIX_FMT_NV21, 1, 3, 2, 1, 2, 2, 2, 3, 2, V4L2_FWHT_FL_PIXENC_YUV},
19 { V4L2_PIX_FMT_NV16, 1, 2, 1, 1, 2, 2, 1, 3, 2, V4L2_FWHT_FL_PIXENC_YUV},
20 { V4L2_PIX_FMT_NV61, 1, 2, 1, 1, 2, 2, 1, 3, 2, V4L2_FWHT_FL_PIXENC_YUV},
21 { V4L2_PIX_FMT_NV24, 1, 3, 1, 1, 2, 1, 1, 3, 2, V4L2_FWHT_FL_PIXENC_YUV},
[all …]
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| /linux-6.12.1/arch/csky/lib/ |
| D | usercopy.c | 1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
15 " mov %3, %1 \n" in raw_copy_from_user()
16 " or %3, %2 \n" in raw_copy_from_user()
17 " andi %3, 3 \n" in raw_copy_from_user()
18 " cmpnei %3, 0 \n" in raw_copy_from_user()
22 " bt 3f \n" in raw_copy_from_user()
23 "2: ldw %3, (%2, 0) \n" in raw_copy_from_user()
24 "10: ldw %4, (%2, 4) \n" in raw_copy_from_user()
25 " stw %3, (%1, 0) \n" in raw_copy_from_user()
[all …]
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| /linux-6.12.1/drivers/clk/xilinx/ |
| D | xlnx_vcu.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016 - 2017 Xilinx, Inc.
11 #include <linux/clk-provider.h>
16 #include <linux/mfd/syscon/xlnx-vcu.h>
22 #include <dt-bindings/clock/xlnx-vcu.h>
28 #define VCU_PLL_CTRL_BYPASS BIT(3)
33 #define VCU_PLL_CFG_RES GENMASK(3, 0)
50 * struct xvcu_device - Xilinx VCU init device structure
75 .reg_stride = 4,
81 * struct xvcu_pll_cfg - Helper data
[all …]
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| /linux-6.12.1/arch/x86/lib/ |
| D | usercopy_32.c | 1 // SPDX-License-Identifier: GPL-2.0
4 * The non inlined parts of asm-i386/uaccess.h are here.
48 : "r"(size & 3), "0"(size / 4), "1"(addr), "a"(0)); \
52 * clear_user - Zero a block of memory in user space.
72 * __clear_user - Zero a block of memory in user space, with less checking.
97 "1: movl 32(%4), %%eax\n" in __copy_user_intel()
99 " jbe 3f\n" in __copy_user_intel()
100 "2: movl 64(%4), %%eax\n" in __copy_user_intel()
102 "3: movl 0(%4), %%eax\n" in __copy_user_intel()
103 "4: movl 4(%4), %%edx\n" in __copy_user_intel()
[all …]
|