/linux-6.12.1/tools/testing/selftests/kvm/aarch64/ |
D | vgic_init.c | 63 GUEST_SYNC(2); in guest_code() 77 struct vm_gic v; in vm_gic_create_with_vcpus() local 79 v.gic_dev_type = gic_dev_type; in vm_gic_create_with_vcpus() 80 v.vm = vm_create_with_vcpus(nr_vcpus, guest_code, vcpus); in vm_gic_create_with_vcpus() 81 v.gic_fd = kvm_create_device(v.vm, gic_dev_type); in vm_gic_create_with_vcpus() 83 return v; in vm_gic_create_with_vcpus() 88 struct vm_gic v; in vm_gic_create_barebones() local 90 v.gic_dev_type = gic_dev_type; in vm_gic_create_barebones() 91 v.vm = vm_create_barebones(); in vm_gic_create_barebones() 92 v.gic_fd = kvm_create_device(v.vm, gic_dev_type); in vm_gic_create_barebones() [all …]
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/linux-6.12.1/lib/crypto/ |
D | blake2s-generic.c | 20 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }, 21 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 }, 22 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 }, 23 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 }, 24 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 }, 25 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 }, 26 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 }, 27 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 }, 28 { 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 }, 29 { 10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0 }, [all …]
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/linux-6.12.1/arch/powerpc/include/asm/ |
D | atomic.h | 27 static __inline__ int arch_atomic_read(const atomic_t *v) in arch_atomic_read() argument 33 __asm__ __volatile__("lwz %0,0(%1)" : "=r"(t) : "b"(&v->counter)); in arch_atomic_read() 35 __asm__ __volatile__("lwz%U1%X1 %0,%1" : "=r"(t) : "m<>"(v->counter)); in arch_atomic_read() 40 static __inline__ void arch_atomic_set(atomic_t *v, int i) in arch_atomic_set() argument 44 __asm__ __volatile__("stw %1,0(%2)" : "=m"(v->counter) : "r"(i), "b"(&v->counter)); in arch_atomic_set() 46 __asm__ __volatile__("stw%U0%X0 %1,%0" : "=m<>"(v->counter) : "r"(i)); in arch_atomic_set() 50 static __inline__ void arch_atomic_##op(int a, atomic_t *v) \ 56 #asm_op "%I2" suffix " %0,%0,%2\n" \ 59 : "=&r" (t), "+m" (v->counter) \ 60 : "r"#sign (a), "r" (&v->counter) \ [all …]
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/linux-6.12.1/drivers/media/dvb-frontends/ |
D | mb86a16.c | 40 #define MB86A16_INFO 2 71 .len = 2 in mb86a16_write() 102 ret = i2c_transfer(state->i2c_adap, msg, 2); in mb86a16_read() 103 if (ret != 2) { in mb86a16_read() 123 val = (timint1 << 4) | (timint2 << 2) | cnext; in CNTM_set() 141 tmp = (8192 * state->master_clk - 2 * m * rate * 8192 + state->master_clk / 2) / state->master_clk; in smrt_set() 146 if (mb86a16_write(state, MB86A16_SRATE1, (state->deci << 2) | in smrt_set() 292 val = 0x7a | (cren << 7) | (afcen << 2); in EN_set() 313 AFCA = 2; in AFCEXEN_set() 317 if (mb86a16_write(state, 0x2a, 0x02 | (afcexen << 5) | (AFCA << 2)) < 0) in AFCEXEN_set() [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
D | display_mode_vba_30.c | 397 struct vba_vars_st *v, 419 unsigned int CursorWidth[][2], 420 unsigned int CursorBPP[][2], 680 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay() 686 // N422/N420 operate at 2 pixels per clock in dscceComputeDelay() 691 pixelsPerClock = 2; in dscceComputeDelay() 696 pixelsPerClock = 2; in dscceComputeDelay() 722 wx = (w + 2) / 3; in dscceComputeDelay() 726 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay() 734 //dsc processes 3 pixel containers per cycle and a container can contain 1 or 2 pixels in dscceComputeDelay() [all …]
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/linux-6.12.1/Documentation/userspace-api/media/v4l/ |
D | subdev-formats.rst | 17 :widths: 1 1 2 184 1 and 2. 200 green and 5-bit blue values padded on the high bit, transferred as 2 220 \setlength{\tabcolsep}{2pt} 223 :header-rows: 2 225 :widths: 36 7 3 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 263 - 2 292 - r\ :sub:`2` 296 - g\ :sub:`2` 300 - b\ :sub:`2` [all …]
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/linux-6.12.1/drivers/staging/media/sunxi/sun6i-isp/ |
D | sun6i_isp_reg.h | 12 #define SUN6I_ISP_ADDR_VALUE(a) ((a) >> 2) 21 #define SUN6I_ISP_FE_CFG_SRC0_MODE(v) (((v) << 8) & GENMASK(9, 8)) argument 22 #define SUN6I_ISP_FE_CFG_SRC1_MODE(v) (((v) << 16) & GENMASK(17, 16)) argument 27 #define SUN6I_ISP_FE_CTRL_PARA_READY BIT(2) 33 #define SUN6I_ISP_FE_CTRL_OUTPUT_SPEED_CTRL(v) (((v) << 16) & GENMASK(17, 16)) argument 39 #define SUN6I_ISP_FE_INT_EN_PARA_SAVE BIT(2) 50 #define SUN6I_ISP_FE_INT_STA_PARA_SAVE BIT(2) 80 #define SUN6I_ISP_MODULE_EN_DPC_LUT BIT(2) 104 #define SUN6I_ISP_MODE_INPUT_FMT(v) ((v) & GENMASK(2, 0)) argument 105 #define SUN6I_ISP_MODE_INPUT_YUV_SEQ(v) (((v) << 3) & GENMASK(4, 3)) argument [all …]
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/linux-6.12.1/crypto/ |
D | blake2b_generic.c | 26 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }, 27 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 }, 28 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 }, 29 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 }, 30 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 }, 31 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 }, 32 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 }, 33 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 }, 34 { 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 }, 35 { 10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0 }, [all …]
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/linux-6.12.1/tools/testing/selftests/net/forwarding/ |
D | gre_multipath_nh_res.sh | 18 # | 2001:db8:1::2/64 | 26 # | v v | 52 # | 2001:db8:2::1/64 | | 59 # | 2001:db8:2::2/64 | 75 ip route add vrf v$h1 192.0.2.16/28 via 192.0.2.2 76 ip route add vrf v$h1 2001:db8:2::/64 via 2001:db8:1::2 81 ip route del vrf v$h1 2001:db8:2::/64 via 2001:db8:1::2 82 ip route del vrf v$h1 192.0.2.16/28 via 192.0.2.2 88 simple_if_init $ol1 192.0.2.2/28 2001:db8:1::2/64 89 __simple_if_init $ul1 v$ol1 [all …]
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D | gre_multipath_nh.sh | 18 # | 2001:db8:1::2/64 | 26 # | v v | 52 # | 2001:db8:2::1/64 | | 59 # | 2001:db8:2::2/64 | 75 ip route add vrf v$h1 192.0.2.16/28 via 192.0.2.2 76 ip route add vrf v$h1 2001:db8:2::/64 via 2001:db8:1::2 81 ip route del vrf v$h1 2001:db8:2::/64 via 2001:db8:1::2 82 ip route del vrf v$h1 192.0.2.16/28 via 192.0.2.2 88 simple_if_init $ol1 192.0.2.2/28 2001:db8:1::2/64 89 __simple_if_init $ul1 v$ol1 [all …]
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D | ip6gre_custom_multipath_hash.sh | 13 # | 198.51.100.{2-253}/24 | | 14 # | 2001:db8:1::{2-fd}/64 | | 25 # | rem=2001:db8:3::2 -. | 27 # | v | 35 # | 2001:db8:10::2/64 | | 48 # | | 2001:db8:11::2/64 | 2001:db8:12::2/64 | 59 # | ^ 2001:db8:13::2/64 | 62 # | loc=2001:db8:3::2 | | 68 # | 2001:db8:2::1/64 | SW4 | 74 # | 203.0.113.{2-253}/24 | [all …]
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D | ip6gre_inner_v6_multipath.sh | 13 # | 2001:db8:1::2/64 | | 23 # | rem=2001:db8:40::2 --. | 25 # | v | 33 # | 2001:db8:80::2/64 | 46 # | | 2001:db8:81::2/64 | 2001:db8:82::2/64 | 52 # | 2001:db8:83::2/64 | SW3 | 59 # | loc=2001:db8:40::2 | | 64 # | 2001:db8:2::1/64 | SW4 | 70 # | 2001:db8:2::2/64 H2 | 83 simple_if_init $h1 2001:db8:1::2/64 [all …]
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D | gre_custom_multipath_hash.sh | 13 # | 198.51.100.{2-253}/24 | | 14 # | 2001:db8:1::{2-fd}/64 | | 27 # | v | 68 # | 2001:db8:2::1/64 | SW4 | 74 # | 203.0.113.{2-253}/24 | 75 # | 2001:db8:2::{2-fd}/64 H2 | 89 simple_if_init $h1 198.51.100.2/24 2001:db8:1::2/64 90 ip route add vrf v$h1 default via 198.51.100.1 dev $h1 91 ip -6 route add vrf v$h1 default via 2001:db8:1::1 dev $h1 96 ip -6 route del vrf v$h1 default [all …]
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D | gre_inner_v6_multipath.sh | 13 # | 2001:db8:1::2/64 | | 25 # | v | 65 # | 2001:db8:2::1/64 | SW4 | 71 # | 2001:db8:2::2/64 H2 | 84 simple_if_init $h1 2001:db8:1::2/64 85 ip -6 route add vrf v$h1 2001:db8:2::/64 via 2001:db8:1::1 90 ip -6 route del vrf v$h1 2001:db8:2::/64 via 2001:db8:1::1 91 simple_if_fini $h1 2001:db8:1::2/64 97 __simple_if_init $ul1 v$ol1 192.0.2.129/28 99 tunnel_create g1 gre 192.0.2.65 192.0.2.66 tos inherit dev v$ol1 [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
D | display_mode_vba_314.c | 54 // Delay in DCFCLK from ARB to DET (1st num is ARB to SDPIF, 2nd number is SDPIF to DET) 701 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay() 707 // N422/N420 operate at 2 pixels per clock in dscceComputeDelay() 711 pixelsPerClock = 2; in dscceComputeDelay() 715 pixelsPerClock = 2; in dscceComputeDelay() 742 wx = (w + 2) / 3; in dscceComputeDelay() 746 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay() 754 //dsc processes 3 pixel containers per cycle and a container can contain 1 or 2 pixels in dscceComputeDelay() 765 Delay = Delay + 2; in dscComputeDelay() 771 Delay = Delay + 2; in dscComputeDelay() [all …]
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/linux-6.12.1/drivers/i3c/master/mipi-i3c-hci/ |
D | cmd_v2.c | 26 #define CMD_U3_HDR_TSP_ML_CTRL(v) FIELD_PREP(W3_MASK(107, 104), v) argument 27 #define CMD_U3_IDB4(v) FIELD_PREP(W3_MASK(103, 96), v) argument 28 #define CMD_U3_HDR_CMD(v) FIELD_PREP(W3_MASK(103, 96), v) argument 29 #define CMD_U2_IDB3(v) FIELD_PREP(W2_MASK( 95, 88), v) argument 30 #define CMD_U2_HDR_BT(v) FIELD_PREP(W2_MASK( 95, 88), v) argument 31 #define CMD_U2_IDB2(v) FIELD_PREP(W2_MASK( 87, 80), v) argument 32 #define CMD_U2_BT_CMD2(v) FIELD_PREP(W2_MASK( 87, 80), v) argument 33 #define CMD_U2_IDB1(v) FIELD_PREP(W2_MASK( 79, 72), v) argument 34 #define CMD_U2_BT_CMD1(v) FIELD_PREP(W2_MASK( 79, 72), v) argument 35 #define CMD_U2_IDB0(v) FIELD_PREP(W2_MASK( 71, 64), v) argument [all …]
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/linux-6.12.1/sound/soc/codecs/ |
D | cs43130.h | 44 #define CS43130_PLL_SET_2 0x030002 /* PLL Setting 2 */ 55 #define CS43130_ASP_NUM_2 0x040011 /* ASP Numerator 2 */ 57 #define CS43130_ASP_DEN_2 0x040013 /* ASP Denominator 2 */ 59 #define CS43130_ASP_LRCK_HI_TIME_2 0x040015 /* ASP LRCK High Time 2 */ 61 #define CS43130_ASP_LRCK_PERIOD_2 0x040017 /* ASP LRCK Period 2 */ 65 #define CS43130_XSP_NUM_2 0x040021 /* XSP Numerator 2 */ 67 #define CS43130_XSP_DEN_2 0x040023 /* XSP Denominator 2 */ 69 #define CS43130_XSP_LRCK_HI_TIME_2 0x040025 /* XSP LRCK High Time 2 */ 71 #define CS43130_XSP_LRCK_PERIOD_2 0x040027 /* XSP LRCK Period 2 */ 75 #define CS43130_ASP_CH_2_LOC 0x050001 /* ASP Chan 2 Location */ [all …]
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/linux-6.12.1/drivers/iommu/ |
D | msm_iommu_hw-8xxx.h | 20 #define SET_GLOBAL_REG_N(b, n, r, v) SET_GLOBAL_REG(b, ((r) + (n << 2)), (v)) argument 21 #define GET_GLOBAL_REG_N(b, n, r) GET_GLOBAL_REG(b, ((r) + (n << 2))) 28 #define SET_GLOBAL_FIELD(b, r, F, v) \ argument 29 SET_FIELD(((b) + (r)), F##_MASK, F##_SHIFT, (v)) 30 #define SET_CONTEXT_FIELD(b, c, r, F, v) \ argument 31 SET_FIELD(((b) + (r) + ((c) << CTX_SHIFT)), F##_MASK, F##_SHIFT, (v)) 35 #define SET_FIELD(addr, mask, shift, v) \ argument 38 writel((t & ~((mask) << (shift))) + (((v) & (mask)) << (shift)), addr);\ 49 #define FL_TYPE_SECT (2 << 0) 54 #define FL_BUFFERABLE (1 << 2) [all …]
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/linux-6.12.1/arch/alpha/include/asm/ |
D | atomic.h | 29 #define arch_atomic_read(v) READ_ONCE((v)->counter) argument 30 #define arch_atomic64_read(v) READ_ONCE((v)->counter) argument 32 #define arch_atomic_set(v,i) WRITE_ONCE((v)->counter, (i)) argument 33 #define arch_atomic64_set(v,i) WRITE_ONCE((v)->counter, (i)) argument 42 static __inline__ void arch_atomic_##op(int i, atomic_t * v) \ 47 " " #asm_op " %0,%2,%0\n" \ 49 " beq %0,2f\n" \ 50 ".subsection 2\n" \ 51 "2: br 1b\n" \ 53 :"=&r" (temp), "=m" (v->counter) \ [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
D | display_mode_vba_31.c | 56 // Delay in DCFCLK from ARB to DET (1st num is ARB to SDPIF, 2nd number is SDPIF to DET) 683 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay() 689 // N422/N420 operate at 2 pixels per clock in dscceComputeDelay() 693 pixelsPerClock = 2; in dscceComputeDelay() 697 pixelsPerClock = 2; in dscceComputeDelay() 724 wx = (w + 2) / 3; in dscceComputeDelay() 728 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay() 736 //dsc processes 3 pixel containers per cycle and a container can contain 1 or 2 pixels in dscceComputeDelay() 747 Delay = Delay + 2; in dscComputeDelay() 753 Delay = Delay + 2; in dscComputeDelay() [all …]
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/linux-6.12.1/drivers/media/platform/sunxi/sun6i-csi/ |
D | sun6i_csi_reg.h | 14 #define SUN6I_CSI_ADDR_VALUE(a) ((a) >> 2) 18 #define SUN6I_CSI_EN_PTN_CYCLE(v) (((v) << 16) & GENMASK(23, 16)) argument 22 #define SUN6I_CSI_EN_CLK_CNT_EN BIT(2) 29 #define SUN6I_CSI_IF_CFG_FIELD_DT_PCLK_SHIFT(v) (((v) << 24) & GENMASK(27, 24)) argument 43 #define SUN6I_CSI_IF_CFG_FIELD_DT_VSYNC (2 << 14) 46 #define SUN6I_CSI_IF_CFG_DATA_WIDTH_12 (2 << 8) 57 #define SUN6I_CSI_CAP_MASK(v) (((v) << 2) & GENMASK(5, 2)) argument 70 #define SUN6I_CSI_CH_CFG_PAD_VAL(v) (((v) << 24) & GENMASK(31, 24)) argument 71 #define SUN6I_CSI_CH_CFG_INPUT_FMT(v) (((v) << 20) & GENMASK(23, 20)) argument 72 #define SUN6I_CSI_CH_CFG_OUTPUT_FMT(v) (((v) << 16) & GENMASK(19, 16)) argument [all …]
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/linux-6.12.1/tools/testing/selftests/rseq/ |
D | rseq-arm64-bits.h | 15 int RSEQ_TEMPLATE_IDENTIFIER(rseq_cmpeqv_storev)(intptr_t *v, intptr_t expect, intptr_t newv, int c… in RSEQ_TEMPLATE_IDENTIFIER() 20 RSEQ_ASM_DEFINE_TABLE(1, 2f, 3f, 4f) in RSEQ_TEMPLATE_IDENTIFIER() 21 RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[cmpfail]) in RSEQ_TEMPLATE_IDENTIFIER() 23 RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[error1]) in RSEQ_TEMPLATE_IDENTIFIER() 24 RSEQ_ASM_DEFINE_EXIT_POINT(2f, %l[error2]) in RSEQ_TEMPLATE_IDENTIFIER() 26 RSEQ_ASM_STORE_RSEQ_CS(2, 1b, rseq_cs) in RSEQ_TEMPLATE_IDENTIFIER() 29 RSEQ_ASM_OP_CMPEQ(v, expect, %l[cmpfail]) in RSEQ_TEMPLATE_IDENTIFIER() 33 RSEQ_ASM_OP_CMPEQ(v, expect, %l[error2]) in RSEQ_TEMPLATE_IDENTIFIER() 35 RSEQ_ASM_OP_FINAL_STORE(newv, v, 3) in RSEQ_TEMPLATE_IDENTIFIER() 42 [v] "Qo" (*v), in RSEQ_TEMPLATE_IDENTIFIER() [all …]
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D | rseq-riscv-bits.h | 9 int RSEQ_TEMPLATE_IDENTIFIER(rseq_cmpeqv_storev)(intptr_t *v, intptr_t expect, intptr_t newv, int c… in RSEQ_TEMPLATE_IDENTIFIER() 13 __asm__ __volatile__ goto(RSEQ_ASM_DEFINE_TABLE(1, 2f, 3f, 4f) in RSEQ_TEMPLATE_IDENTIFIER() 14 RSEQ_ASM_DEFINE_EXIT_POINT(2f, "%l[cmpfail]") in RSEQ_TEMPLATE_IDENTIFIER() 16 RSEQ_ASM_DEFINE_EXIT_POINT(2f, "%l[error1]") in RSEQ_TEMPLATE_IDENTIFIER() 17 RSEQ_ASM_DEFINE_EXIT_POINT(2f, "%l[error2]") in RSEQ_TEMPLATE_IDENTIFIER() 19 RSEQ_ASM_STORE_RSEQ_CS(2, 1b, rseq_cs) in RSEQ_TEMPLATE_IDENTIFIER() 22 RSEQ_ASM_OP_CMPEQ(v, expect, "%l[cmpfail]") in RSEQ_TEMPLATE_IDENTIFIER() 26 RSEQ_ASM_OP_CMPEQ(v, expect, "%l[error2]") in RSEQ_TEMPLATE_IDENTIFIER() 28 RSEQ_ASM_OP_FINAL_STORE(newv, v, 3) in RSEQ_TEMPLATE_IDENTIFIER() 35 [v] "m" (*v), in RSEQ_TEMPLATE_IDENTIFIER() [all …]
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/linux-6.12.1/Documentation/hwmon/ |
D | mc13783-adc.rst | 47 0 Battery Voltage (BATT) 2.50 - 4.65V -2.40V 49 2 Application Supply (BP) 2.50 - 4.65V -2.40V 50 3 Charger Voltage (CHRGRAW) 0 - 10V / /5 51 0 - 20V /10 52 4 Charger Current (CHRGISNSP-CHRGISNSN) -0.25 - 0.25V x4 53 5 General Purpose ADIN5 / Battery Pack Thermistor 0 - 2.30V No 54 6 General Purpose ADIN6 / Backup Voltage (LICELL) 0 - 2.30V / No / 55 1.50 - 3.50V -1.20V 56 7 General Purpose ADIN7 / UID / Die Temperature 0 - 2.30V / No / 57 0 - 2.55V / x0.9 / No [all …]
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/linux-6.12.1/arch/arm/include/asm/ |
D | atomic.h | 25 #define arch_atomic_read(v) READ_ONCE((v)->counter) argument 26 #define arch_atomic_set(v,i) WRITE_ONCE(((v)->counter), (i)) argument 37 static inline void arch_atomic_##op(int i, atomic_t *v) \ 42 prefetchw(&v->counter); \ 49 : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) \ 50 : "r" (&v->counter), "Ir" (i) \ 55 static inline int arch_atomic_##op##_return_relaxed(int i, atomic_t *v) \ 60 prefetchw(&v->counter); \ 68 : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) \ 69 : "r" (&v->counter), "Ir" (i) \ [all …]
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