Searched full:265 (Results 1 – 25 of 221) sorted by relevance
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| /linux-6.12.1/drivers/media/platform/allegro-dvt/ |
| D | nal-hevc.h | 63 * Rec. ITU-T H.265 (02/2018) 7.3.2.1 Video parameter set RBSP syntax
139 * H.265 (02/2018) E.2.1 VUI parameters syntax.
202 * Rec. ITU-T H.265 (02/2018) 7.3.2.2 Sequence parameter set RBSP syntax
329 * in Rec. ITU-T H.265 (02/2018) A.3.
352 * in Rec. ITU-T H.265 (02/2018) A.4.1.
373 * Rec. ITU-T H.265 (02/2018) A.4.1.
380 * T-Rec-H.265 p. 280: general_level_idc and sub_layer_level_idc[ i ] in nal_hevc_level()
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| D | nal-hevc.c | 7 * The conversion is defined in "ITU-T Rec. H.265 (02/2018) high efficiency
28 * See Rec. ITU-T H.265 (02/2018) Table 7-1 - NAL unit type codes and NAL unit
798 * The RBSP format of the filler data is specified in Rec. ITU-T H.265
845 * The RBSP format of the filler data is specified in Rec. ITU-T H.265
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| /linux-6.12.1/Documentation/devicetree/bindings/media/ |
| D | allegro,al5e.yaml | 14 either be a H.264/H.265 encoder or H.264/H.265 decoder ip core.
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| /linux-6.12.1/drivers/media/platform/verisilicon/ |
| D | rockchip_vpu981_regs.h | 402 #define av1_axi_arqos AV1_DEC_REG(265, 0, 0xf)
403 #define av1_axi_awqos AV1_DEC_REG(265, 4, 0xf)
404 #define av1_axi_wr_ostd_threshold AV1_DEC_REG(265, 8, 0x3ff)
405 #define av1_axi_rd_ostd_threshold AV1_DEC_REG(265, 18, 0x3ff)
406 #define av1_axi_wr_4k_dis AV1_DEC_REG(265, 31, 0x1)
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| /linux-6.12.1/Documentation/devicetree/bindings/mmc/ |
| D | sdhci-milbeaut.txt | 23 interrupts = <0 265 0x4>;
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| /linux-6.12.1/include/dt-bindings/clock/ |
| D | exynos5410.h | 44 #define CLK_USI0 265
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| D | exynos5250.h | 69 #define CLK_SMMU_GSCL3 265
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| D | imx6qdl-clock.h | 275 #define IMX6QDL_CLK_DCIC2 265
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| D | g12a-clkc.h | 276 #define CLKID_NNA_CORE_CLK_SEL 265
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| D | qcom,gcc-ipq806x.h | 267 #define USB30_1_UTMI_CLK 265
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| D | exynos5420.h | 74 #define CLK_USI0 265
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/bounding_boxes/ |
| D | dcn4_soc_bb.h | 255 .maximum_latency_when_urgent_uclk_cycles = 265,
256 .average_latency_when_urgent_uclk_cycles = 265,
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| D | dcn3_soc_bb.h | 305 .maximum_latency_when_urgent_uclk_cycles = 265,
306 .average_latency_when_urgent_uclk_cycles = 265,
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| /linux-6.12.1/Documentation/devicetree/bindings/pinctrl/ |
| D | ti,iodelay.txt | 36 0x1a4 A_DELAY_PS(265) G_DELAY_PS(360) /* CFG_GPMC_A20_IN */
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| /linux-6.12.1/drivers/cpufreq/ |
| D | pxa2xx-cpufreq.c | 65 {265400, -1, -1}, /* 265, 265, 133, 66 */
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| /linux-6.12.1/scripts/ |
| D | extract-vmlinux | 58 try_decompress '(\265/\375' xxx unzstd
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| D | extract-ikconfig | 65 try_decompress '\050\265\057\375' xxx unzstd
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| /linux-6.12.1/drivers/soc/tegra/ |
| D | Kconfig | 89 and decoding of various video standards including H.265, H.264 and
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| /linux-6.12.1/include/dt-bindings/gce/ |
| D | mt8183-gce.h | 128 #define CMDQ_EVENT_ISP_FRAME_DONE_P2_8 265
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| D | mt6779-gce.h | 142 #define CMDQ_EVENT_DIP_CQ_THREAD8_EOF 265
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| /linux-6.12.1/arch/powerpc/kernel/syscalls/ |
| D | syscall.tbl | 349 265 32 mq_timedreceive sys_mq_timedreceive_time32
350 265 64 mq_timedreceive sys_mq_timedreceive
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| /linux-6.12.1/tools/perf/arch/powerpc/entry/syscalls/ |
| D | syscall.tbl | 349 265 32 mq_timedreceive sys_mq_timedreceive_time32
350 265 64 mq_timedreceive sys_mq_timedreceive
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| /linux-6.12.1/Documentation/userspace-api/media/v4l/ |
| D | biblio.rst | 129 ITU H.265/HEVC
132 :title: ITU-T Rec. H.265 | ISO/IEC 23008-2 "High Efficiency Video Coding"
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| /linux-6.12.1/drivers/scsi/qla2xxx/ |
| D | qla_tmpl.h | 45 #define ENTRY_TYPE_PSE_RISC 265
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| /linux-6.12.1/drivers/gpu/ipu-v3/ |
| D | ipu-ic-csc.c | 193 .offset = { -276, 265, -358, },
215 .offset = { -351, 265, -443, },
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