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/linux-6.12.1/arch/x86/platform/ce4100/
Dfalconfalls.dts1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
10 compatible = "intel,falconfalls";
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "intel,ce4100";
27 #address-cells = <1>;
28 #size-cells = <1>;
[all …]
/linux-6.12.1/arch/powerpc/boot/dts/fsl/
Dt4240si-post.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
20 * Foundation, either version 2 of that License or (at your option) any
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 #address-cells = <2>;
52 #size-cells = <1>;
[all …]
Dt2081si-post.dtsi4 * Copyright 2013 - 2014 Freescale Semiconductor Inc.
20 * Foundation, either version 2 of that License or (at your option) any
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 #address-cells = <2>;
52 #size-cells = <1>;
[all …]
Dp1023si-post.dtsi4 * Copyright 2011 - 2014 Freescale Semiconductor Inc.
20 * Foundation, either version 2 of that License or (at your option) any
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10 0>;
51 #address-cells = <2>;
52 #size-cells = <1>;
[all …]
Db4si-post.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor, Inc.
20 * Foundation, either version 2 of that License or (at your option) any
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 #address-cells = <2>;
52 #size-cells = <1>;
[all …]
Db4860si-post.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
20 * Foundation, either version 2 of that License or (at your option) any
35 /include/ "b4si-post.dtsi"
39 compatible = "fsl,b4860-pcie", "fsl,qoriq-pcie-v2.4";
43 compatible = "fsl,srio";
44 interrupts = <16 2 1 20>;
45 #address-cells = <2>;
46 #size-cells = <2>;
47 fsl,iommu-parent = <&pamu0>;
51 #address-cells = <2>;
[all …]
Dt1040si-post.dtsi4 * Copyright 2013 - 2014 Freescale Semiconductor Inc.
20 * Foundation, either version 2 of that License or (at your option) any
35 #include <dt-bindings/thermal/thermal.h>
38 compatible = "fsl,bman-fbpr";
39 alloc-ranges = <0 0 0x10000 0>;
43 compatible = "fsl,qman-fqd";
44 alloc-ranges = <0 0 0x10000 0>;
48 compatible = "fsl,qman-pfdr";
49 alloc-ranges = <0 0 0x10000 0>;
53 #address-cells = <2>;
[all …]
Dt1023si-post.dtsi20 * Foundation, either version 2 of that License or (at your option) any
35 #include <dt-bindings/thermal/thermal.h>
38 compatible = "fsl,bman-fbpr";
39 alloc-ranges = <0 0 0x10000 0>;
43 compatible = "fsl,qman-fqd";
44 alloc-ranges = <0 0 0x10000 0>;
48 compatible = "fsl,qman-pfdr";
49 alloc-ranges = <0 0 0x10000 0>;
53 #address-cells = <2>;
54 #size-cells = <1>;
[all …]
/linux-6.12.1/arch/powerpc/boot/dts/
Dmpc5200b.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
10 /dts-v1/;
14 compatible = "fsl,mpc5200b";
15 #address-cells = <1>;
16 #size-cells = <1>;
17 interrupt-parent = <&mpc5200_pic>;
20 #address-cells = <1>;
21 #size-cells = <0>;
26 d-cache-line-size = <32>;
27 i-cache-line-size = <32>;
[all …]
Dlite5200.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2006-2007 Secret Lab Technologies Ltd.
9 /dts-v1/;
13 compatible = "fsl,lite5200";
14 #address-cells = <1>;
15 #size-cells = <1>;
16 interrupt-parent = <&mpc5200_pic>;
19 #address-cells = <1>;
20 #size-cells = <0>;
25 d-cache-line-size = <32>;
[all …]
Dxcalibur1501.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 * XCalibur1501 6U CompactPCI single-board computer based on MPC8572E
9 /dts-v1/;
12 compatible = "xes,xcalibur1501", "xes,MPC8572";
13 #address-cells = <2>;
14 #size-cells = <2>;
27 #address-cells = <1>;
28 #size-cells = <0>;
33 d-cache-line-size = <32>; // 32 bytes
34 i-cache-line-size = <32>; // 32 bytes
[all …]
Dxpedite5301.dts1 // SPDX-License-Identifier: GPL-2.0-only
9 /dts-v1/;
12 compatible = "xes,xpedite5301", "xes,MPC8572";
13 #address-cells = <2>;
14 #size-cells = <2>;
15 form-factor = "PMC/XMC";
16 boot-bank = <0x0>; /* 0: Primary flash, 1: Secondary flash */
28 #address-cells = <1>;
29 #size-cells = <0>;
34 d-cache-line-size = <32>; // 32 bytes
[all …]
Dxpedite5370.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 * XPedite5370 3U VPX single-board computer based on MPC8572E
9 /dts-v1/;
12 compatible = "xes,xpedite5370", "xes,MPC8572";
13 #address-cells = <2>;
14 #size-cells = <2>;
26 #address-cells = <1>;
27 #size-cells = <0>;
32 d-cache-line-size = <32>; // 32 bytes
33 i-cache-line-size = <32>; // 32 bytes
[all …]
/linux-6.12.1/arch/arm64/boot/dts/lg/
Dlg1313.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
15 compatible = "lge,lg1313";
16 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <0>;
24 compatible = "arm,cortex-a53";
[all …]
Dlg1312.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
15 compatible = "lge,lg1312";
16 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <0>;
24 compatible = "arm,cortex-a53";
[all …]
/linux-6.12.1/arch/arm/boot/dts/synaptics/
Dberlin2q.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2014 Antoine Ténart <antoine.tenart@free-electrons.com>
6 #include <dt-bindings/clock/berlin2q.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 model = "Marvell Armada 1500 pro (BG2-Q) SoC";
11 compatible = "marvell,berlin2q", "marvell,berlin";
12 #address-cells = <1>;
13 #size-cells = <1>;
21 #address-cells = <1>;
22 #size-cells = <0>;
[all …]
Dberlin2cd.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Device Tree Include file for Marvell Armada 1500-mini (Berlin BG2CD) SoC
11 #include <dt-bindings/clock/berlin2.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 model = "Marvell Armada 1500-mini (BG2CD) SoC";
16 compatible = "marvell,berlin2cd", "marvell,berlin";
17 #address-cells = <1>;
18 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
[all …]
Dberlin2.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
11 #include <dt-bindings/clock/berlin2.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 compatible = "marvell,berlin2", "marvell,berlin";
17 #address-cells = <1>;
18 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
29 enable-method = "marvell,berlin-smp";
32 compatible = "marvell,pj4b";
[all …]
/linux-6.12.1/arch/arm/boot/dts/hisilicon/
Dhisi-x5hd2.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2014 Linaro Ltd.
4 * Copyright (c) 2013-2014 HiSilicon Limited.
7 #include <dt-bindings/clock/hix5hd2-clock.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
17 gic: interrupt-controller@f8a01000 {
18 compatible = "arm,cortex-a9-gic";
19 #interrupt-cells = <3>;
20 #address-cells = <0>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/sprd/
Dwhale2.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/sprd,sc9860-clk.h>
11 interrupt-parent = <&gic>;
12 #address-cells = <2>;
13 #size-cells = <2>;
16 compatible = "simple-bus";
17 #address-cells = <2>;
18 #size-cells = <2>;
22 compatible = "syscon";
27 compatible = "syscon";
[all …]
/linux-6.12.1/arch/arm64/boot/dts/hisilicon/
Dhi3670.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/hi3670-clock.h>
13 compatible = "hisilicon,hi3670";
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 compatible = "arm,psci-0.2";
24 #address-cells = <2>;
25 #size-cells = <0>;
[all …]
Dhi6220.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/reset/hisi,hi6220-resets.h>
10 #include <dt-bindings/clock/hi6220-clock.h>
11 #include <dt-bindings/pinctrl/hisi.h>
12 #include <dt-bindings/thermal/thermal.h>
15 compatible = "hisilicon,hi6220";
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
[all …]
/linux-6.12.1/drivers/mfd/
Dqcom-spmi-pmic.c1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <soc/qcom/qcom-spmi-pmic.h>
40 { .compatible = "qcom,pm660", .data = N_USIDS(2) },
41 { .compatible = "qcom,pm660l", .data = N_USIDS(2) },
42 { .compatible = "qcom,pm8004", .data = N_USIDS(2) },
43 { .compatible = "qcom,pm8005", .data = N_USIDS(2) },
44 { .compatible = "qcom,pm8019", .data = N_USIDS(2) },
45 { .compatible = "qcom,pm8028", .data = N_USIDS(2) },
46 { .compatible = "qcom,pm8110", .data = N_USIDS(2) },
47 { .compatible = "qcom,pm8150", .data = N_USIDS(2) },
[all …]
/linux-6.12.1/arch/arm/boot/dts/nxp/ls/
Dls1021a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <2>;
11 #size-cells = <2>;
12 interrupt-parent = <&gic>;
30 #address-cells = <1>;
31 #size-cells = <0>;
34 compatible = "arm,cortex-a7";
[all …]
/linux-6.12.1/arch/arm/boot/dts/ti/omap/
Dam43xx-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 sys_clkin_ck: clock-sys-clkin-31@40 {
9 #clock-cells = <0>;
10 compatible = "ti,mux-clock";
11 clock-output-names = "sys_clkin_ck";
13 ti,bit-shift = <31>;
17 crystal_freq_sel_ck: clock-crystal-freq-sel-29@40 {
18 #clock-cells = <0>;
19 compatible = "ti,mux-clock";
20 clock-output-names = "crystal_freq_sel_ck";
[all …]

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