Searched +full:169445 +full:- +full:nand +full:- +full:gpio (Results 1 – 3 of 3) sorted by relevance
1 /dts-v1/;4 #address-cells = <1>;5 #size-cells = <1>;6 compatible = "ni,169445";9 #address-cells = <1>;10 #size-cells = <0>;25 compatible = "fixed-clock";26 #clock-cells = <0>;27 clock-frequency = <50000000>;30 cpu_intc: interrupt-controller {[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/gpio/gpio-mmio.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Generic MMIO GPIO10 - Linus Walleij <linus.walleij@linaro.org>11 - Bartosz Golaszewski <brgl@bgdev.pl>14 Some simple GPIO controllers may consist of a single data register or a pair15 of set/clear-bit registers. Such controllers are common for glue logic in16 FPGAs or ASICs. Commonly, these controllers are accessed over memory-mapped[all …]
1 // SPDX-License-Identifier: GPL-2.0+3 * Generic driver for memory-mapped GPIO controllers.10 * ..The simplest form of a GPIO controller that the driver supports is``11 * `.just a single "data" register, where GPIO state can be read and/or `16 __________|~$@~~~ %~ /o*o*o*o*o*o\ .. Implementing such a GPIO .22 * . big-endian notation, just`. .. A bit more sophisticated controllers ,23 * . register the device with -be`. .with a pair of set/clear-bit registers ,29 * .. The expectation is that in at least some cases . ,-~~~-,30 * .this will be used with roll-your-own ASIC/FPGA .` \ /58 #include <linux/gpio/driver.h>[all …]