| /linux-6.12.1/drivers/pcmcia/ |
| D | soc_common.h | 64 * has a minimum value of 165ns. Section 4.13.5 says that twIOWR has
65 * a minimum value of 165ns, as well. Section 4.7.2 (describing
75 * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute
79 #define SOC_PCMCIA_IO_ACCESS (165)
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| /linux-6.12.1/drivers/net/fddi/skfp/ |
| D | smtdef.c | 211 mib->m[MAC0].fddiMACT_MaxCapabilitiy = (u_long)(- MS2BCLK(165)) ; in smt_init_mib()
216 mib->m[MAC0].fddiMACT_Req = (u_long)(- MS2BCLK(165)) ; in smt_init_mib()
217 mib->m[MAC0].fddiMACT_ReqMIB = (u_long)(- MS2BCLK(165)) ; in smt_init_mib()
218 mib->m[MAC0].fddiMACT_Max = (u_long)(- MS2BCLK(165)) ; in smt_init_mib()
219 mib->m[MAC0].fddiMACT_MaxMIB = (u_long)(- MS2BCLK(165)) ; in smt_init_mib()
235 (u_long)(- MS2BCLK(165)) ; in smt_init_mib()
237 (u_long)(- MS2BCLK(165)) ; in smt_init_mib()
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| /linux-6.12.1/drivers/soc/tegra/fuse/ |
| D | speedo-tegra20.c | 49 {165, 195, 224, UINT_MAX},
50 {165, 195, 224, UINT_MAX},
51 {165, 195, 224, UINT_MAX},
|
| /linux-6.12.1/drivers/pinctrl/mediatek/ |
| D | pinctrl-mt6795.c | 90 PINS_FIELD16(165, 165, 0xd00, 0x10, 14, 1),
145 PINS_FIELD16(165, 165, 0xd00, 0x10, 13, 1),
196 PIN_FIELD16(165, 165, 0xd00, 0x10, 2, 1), /* RST */
269 PIN_FIELD16(165, 165, 0xd00, 0x10, 0, 1),
324 PIN_FIELD16(165, 165, 0xd00, 0x10, 1, 1),
382 PIN_FIELD16(165, 165, 0xd00, 0x10, 8, 2),
443 PIN_FIELD16(165, 165, 0xd00, 0x10, 12, 1),
564 MTK_PULL_PUPD_R1R0_TYPE,/*164*/ MTK_PULL_PUPD_R1R0_TYPE,/*165*/
|
| /linux-6.12.1/arch/arm/mach-omap2/ |
| D | opp2xxx.h | 166 #define RI_CLKSEL_L3 (4 << 0) /* 165MHz */
178 #define RI_CLKSEL_IVA (4 << 8) /* iva1 - 165MHz */
183 #define RI_CLKSEL_GFX (1 << 0) /* 165MHz */
305 * #2 (ratio1) DPLL = 330*2 = 660MHz, L3=165MHz
315 /* Core frequency changed from 330/165 to 329/164 MHz*/
345 * 165 (ratio1) same as above #2
|
| /linux-6.12.1/drivers/media/platform/ti/omap3isp/ |
| D | gamma_table.h | 28 162, 163, 163, 164, 164, 164, 164, 165, 165, 165, 165, 166, 166, 167, 167, 168,
|
| /linux-6.12.1/drivers/gpu/drm/i915/display/ |
| D | intel_vbt_defs.h | 151 BDB_PSR = 9, /* 165+ */
694 u8 full_link:1; /* 165+ */
695 u8 require_aux_to_wakeup:1; /* 165+ */
699 u8 idle_frames:4; /* 165+ */
700 u8 lines_to_wait:3; /* 165+ */
704 u16 tp1_wakeup_time; /* 165+ */
705 u16 tp2_tp3_wakeup_time; /* 165+ */
807 u16 psr_enabled:1; /* 165-227 */
808 u16 ips_enabled:1; /* 165+ */
809 u16 dfps_enabled:1; /* 165+ */
[all …]
|
| /linux-6.12.1/drivers/regulator/ |
| D | max20411-regulator.c | 20 #define MAX20411_MAX_SEL 165 /* 1.275V */
83 * with valid selector between 41 to 165 (0.5V to 1.275V)
|
| /linux-6.12.1/drivers/net/wireless/intel/iwlwifi/mvm/ |
| D | rfi.c | 21 {cpu_to_le16(176), {149, 151, 153, 157, 159, 161, 165, 163, 167, 169,
38 {cpu_to_le16(240), {114, 151, 155, 157, 159, 161, 165},
|
| /linux-6.12.1/tools/testing/selftests/firmware/ |
| D | settings | 8 timeout=165
|
| /linux-6.12.1/drivers/pinctrl/uniphier/ |
| D | pinctrl-uniphier-pro4.c | 510 UNIPHIER_PINCTRL_PIN(165, "RGMII_TXCTL", 6,
553 165, UNIPHIER_PIN_DRV_1BIT,
554 165, UNIPHIER_PIN_PULL_DOWN),
1008 static const unsigned ether_mii_pins[] = {160, 161, 162, 163, 164, 165, 166,
1013 static const unsigned ether_rgmii_pins[] = {160, 161, 162, 163, 164, 165, 167,
1018 static const unsigned ether_rmii_pins[] = {160, 161, 162, 165, 168, 169, 172,
1021 static const unsigned ether_rmiib_pins[] = {161, 162, 165, 167, 168, 169, 172,
1108 160, 161, 162, 163, 164, 165, 166, 167, /* PORT20x */
|
| /linux-6.12.1/arch/arm64/boot/dts/amlogic/ |
| D | meson-gxlx-s905l-p271.dts | 33 <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
|
| D | meson-gx-mali450.dtsi | 51 <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
|
| /linux-6.12.1/drivers/thermal/renesas/ |
| D | rzg2l_thermal.c | 106 * Tj = (dsensor − calib1) * 165/ (calib0 − calib1) − 40 in rzg2l_thermal_get_temp()
109 val = ((dsensor - priv->calib1) * (MCELSIUS(165) / in rzg2l_thermal_get_temp()
|
| /linux-6.12.1/include/dt-bindings/clock/ |
| D | qcom,ipq5332-gcc.h | 174 #define GCC_MEM_NOC_AHB_CLK 165
348 #define GCC_PCIE3X1_1_PIPE_ARES 165
|
| /linux-6.12.1/Documentation/devicetree/bindings/i2c/ |
| D | socionext,synquacer-i2c.yaml | 51 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
|
| /linux-6.12.1/drivers/thermal/mediatek/ |
| D | auxadc_thermal.c | 116 #define MT8173_CALIBRATION 165
205 #define MT2701_CALIBRATION 165
226 #define MT2712_CALIBRATION 165
239 #define MT7622_CALIBRATION 165
286 #define MT7986_CALIBRATION 165
750 tmp = tmp / (165 - mt->o_slope); in raw_to_mcelsius_v2()
752 tmp = tmp / (165 + mt->o_slope); in raw_to_mcelsius_v2()
|
| /linux-6.12.1/drivers/infiniband/hw/hfi1/ |
| D | qsfp.h | 87 /* Bytes 165..167 are Vendor OUI number */
88 #define QSFP_VOUI_OFFS 165
|
| /linux-6.12.1/include/media/i2c/ |
| D | tvp7002.h | 2 /* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
|
| /linux-6.12.1/Documentation/devicetree/bindings/reset/ |
| D | zynq-reset.txt | 34 165: gem1 rx reset
|
| /linux-6.12.1/arch/arm64/boot/dts/mediatek/ |
| D | mt8183-kukui-audio-da7219.dtsi | 14 interrupts-extended = <&pio 165 IRQ_TYPE_LEVEL_LOW>;
|
| D | mt2712-pinfunc.h | 784 #define MT2712_PIN_165_SPI4_CSN__FUNC_GPIO165 (MTK_PIN_NO(165) | 0)
785 #define MT2712_PIN_165_SPI4_CSN__FUNC_SPI_CS_4_ (MTK_PIN_NO(165) | 1)
786 #define MT2712_PIN_165_SPI4_CSN__FUNC_LCM_RST0 (MTK_PIN_NO(165) | 2)
787 #define MT2712_PIN_165_SPI4_CSN__FUNC_SPI_CS_1_ (MTK_PIN_NO(165) | 3)
788 #define MT2712_PIN_165_SPI4_CSN__FUNC_UTXD4 (MTK_PIN_NO(165) | 4)
789 #define MT2712_PIN_165_SPI4_CSN__FUNC_I2SO1_DO (MTK_PIN_NO(165) | 5)
790 #define MT2712_PIN_165_SPI4_CSN__FUNC_TDMO0_MCLK (MTK_PIN_NO(165) | 6)
791 #define MT2712_PIN_165_SPI4_CSN__FUNC_I2SO0_MCK (MTK_PIN_NO(165) | 7)
|
| /linux-6.12.1/drivers/infiniband/hw/qib/ |
| D | qib_qsfp.h | 102 /* Bytes 165..167 are Vendor OUI number */
103 #define QSFP_VOUI_OFFS 165
|
| /linux-6.12.1/Documentation/devicetree/bindings/interconnect/ |
| D | qcom,osm-l3.yaml | 66 #define GPLL0 165
|
| /linux-6.12.1/include/dt-bindings/reset/ |
| D | altr,rst-mgr-a10.h | 93 #define TAPCOLD_RESET 165
|