/linux-6.12.1/lib/crypto/ |
D | blake2s-generic.c | 20 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }, 21 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 }, 22 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 }, 23 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 }, 24 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 }, 25 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 }, 26 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 }, 27 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 }, 28 { 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 }, 29 { 10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0 }, [all …]
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/linux-6.12.1/Documentation/hwmon/ |
D | ltc4245.rst | 52 in1_input 12v input voltage (mV) 53 in2_input 5v input voltage (mV) 54 in3_input 3v input voltage (mV) 55 in4_input Vee (-12v) input voltage (mV) 57 in1_min_alarm 12v input undervoltage alarm 58 in2_min_alarm 5v input undervoltage alarm 59 in3_min_alarm 3v input undervoltage alarm 60 in4_min_alarm Vee (-12v) input undervoltage alarm 62 curr1_input 12v current (mA) 63 curr2_input 5v current (mA) [all …]
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D | corsair-psu.rst | 51 curr2_input Current on the 12v psu rail 52 curr2_crit Current max critical value on the 12v psu rail 53 curr3_input Current on the 5v psu rail 54 curr3_crit Current max critical value on the 5v psu rail 55 curr4_input Current on the 3.3v psu rail 56 curr4_crit Current max critical value on the 3.3v psu rail 59 in1_input Voltage of the 12v psu rail 60 in1_crit Voltage max critical value on the 12v psu rail 61 in1_lcrit Voltage min critical value on the 12v psu rail 62 in2_input Voltage of the 5v psu rail [all …]
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D | mc13783-adc.rst | 30 (MC13783) resp. 12 (MC13892) channels which can be used in different modes. The 47 0 Battery Voltage (BATT) 2.50 - 4.65V -2.40V 49 2 Application Supply (BP) 2.50 - 4.65V -2.40V 50 3 Charger Voltage (CHRGRAW) 0 - 10V / /5 51 0 - 20V /10 52 4 Charger Current (CHRGISNSP-CHRGISNSN) -0.25 - 0.25V x4 53 5 General Purpose ADIN5 / Battery Pack Thermistor 0 - 2.30V No 54 6 General Purpose ADIN6 / Backup Voltage (LICELL) 0 - 2.30V / No / 55 1.50 - 3.50V -1.20V 56 7 General Purpose ADIN7 / UID / Die Temperature 0 - 2.30V / No / [all …]
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D | intel-m10-bmc-hwmon.rst | 60 in3_label "12V Backplane Voltage" 61 in4_label "1.2V Voltage" 62 in5_label "12V AUX Voltage" 63 in6_label "1.8V Voltage" 64 in7_label "3.3V Voltage" 69 curr2_label "12V Backplane Current" 70 curr3_label "12V AUX Current"
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/linux-6.12.1/crypto/ |
D | blake2b_generic.c | 25 static const u8 blake2b_sigma[12][16] = { 26 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }, 27 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 }, 28 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 }, 29 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 }, 30 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 }, 31 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 }, 32 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 }, 33 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 }, 34 { 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 }, [all …]
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/linux-6.12.1/arch/arm/crypto/ |
D | blake2s-core.S | 87 // b = ror32(b ^ c, 12); 95 add \a0, \a0, \b0, ror #12 96 add \a1, \a1, \b1, ror #12 109 eor \b0, \c0, \b0, ror#12 110 eor \b1, \c1, \b1, ror#12 113 // Execute one round of BLAKE2s by updating the state matrix v[0..15]. v[0..9] 115 // spilling v[8..9], then to v[9..15], then to the message block. r10-r12 and 132 // (v[0], v[4], v[8], v[12]) and (v[1], v[5], v[9], v[13]). 133 __ldrd r10, r11, sp, 16 // load v[12] and v[13] 140 // (v[2], v[6], v[10], v[14]) and (v[3], v[7], v[11], v[15]). [all …]
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D | blake2b-neon-core.S | 63 // Execute one round of BLAKE2b by updating the state matrix v[0..15] in the 73 // (v[0], v[4], v[8], v[12]), (v[1], v[5], v[9], v[13]), 74 // (v[2], v[6], v[10], v[14]), and (v[3], v[7], v[11], v[15]). 145 // (v[0], v[5], v[10], v[15]), (v[1], v[6], v[11], v[12]), 146 // (v[2], v[7], v[8], v[13]), and (v[3], v[4], v[9], v[14]). 274 // 'v'. Fortunately, there are exactly enough NEON registers to fit the 285 veor q6, q6, q14 // v[12..13] = IV[4..5] ^ t[0..1] 287 veor q7, q7, q15 // v[14..15] = IV[6..7] ^ f[0..1] 295 _blake2b_round 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 296 _blake2b_round 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 [all …]
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/linux-6.12.1/arch/x86/include/asm/ |
D | sev-common.h | 12 #define GHCB_DATA_LOW 12 15 #define GHCB_DATA(v) \ argument 16 (((unsigned long)(v) & ~GHCB_MSR_INFO_MASK) >> GHCB_DATA_LOW) 31 #define GHCB_MSR_INFO(v) ((v) & 0xfffUL) argument 32 #define GHCB_MSR_PROTO_MAX(v) (((v) >> 48) & 0xffff) argument 33 #define GHCB_MSR_PROTO_MIN(v) (((v) >> 32) & 0xffff) argument 51 /* GHCBData[31:12] */ \ 59 #define GHCB_MSR_AP_RESET_HOLD_RESULT_POS 12 64 #define GHCB_MSR_GPA_VALUE_POS 12 72 #define GHCB_MSR_REG_GPA_REQ_VAL(v) \ argument [all …]
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D | perf_event_p4.h | 40 #define P4_ESCR_EVENT(v) ((v) << P4_ESCR_EVENT_SHIFT) argument 41 #define P4_ESCR_EMASK(v) ((v) << P4_ESCR_EVENTMASK_SHIFT) argument 42 #define P4_ESCR_TAG(v) ((v) << P4_ESCR_TAG_SHIFT) argument 62 #define P4_CCCR_THRESHOLD(v) ((v) << P4_CCCR_THRESHOLD_SHIFT) argument 63 #define P4_CCCR_ESEL(v) ((v) << P4_CCCR_ESCR_SELECT_SHIFT) argument 81 #define p4_config_pack_escr(v) (((u64)(v)) << 32) argument 82 #define p4_config_pack_cccr(v) (((u64)(v)) & 0xffffffffULL) argument 83 #define p4_config_unpack_escr(v) (((u64)(v)) >> 32) argument 84 #define p4_config_unpack_cccr(v) (((u64)(v)) & 0xffffffffULL) argument 86 #define p4_config_unpack_emask(v) \ argument [all …]
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/linux-6.12.1/drivers/staging/media/sunxi/sun6i-isp/ |
D | sun6i_isp_reg.h | 21 #define SUN6I_ISP_FE_CFG_SRC0_MODE(v) (((v) << 8) & GENMASK(9, 8)) argument 22 #define SUN6I_ISP_FE_CFG_SRC1_MODE(v) (((v) << 16) & GENMASK(17, 16)) argument 33 #define SUN6I_ISP_FE_CTRL_OUTPUT_SPEED_CTRL(v) (((v) << 16) & GENMASK(17, 16)) argument 89 #define SUN6I_ISP_MODULE_EN_RGB2RGB BIT(12) 104 #define SUN6I_ISP_MODE_INPUT_FMT(v) ((v) & GENMASK(2, 0)) argument 105 #define SUN6I_ISP_MODE_INPUT_YUV_SEQ(v) (((v) << 3) & GENMASK(4, 3)) argument 106 #define SUN6I_ISP_MODE_OTF_DPC(v) (((v) << 16) & BIT(16)) argument 107 #define SUN6I_ISP_MODE_SHARP(v) (((v) << 17) & BIT(17)) argument 108 #define SUN6I_ISP_MODE_HIST(v) (((v) << 20) & GENMASK(21, 20)) argument 123 #define SUN6I_ISP_IN_CFG_STRIDE_DIV16(v) ((v) & GENMASK(10, 0)) argument [all …]
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/linux-6.12.1/arch/arm64/crypto/ |
D | sha512-ce-core.S | 15 .irp b,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19 85 ld1 {v\rc1\().2d}, [x4], #16 87 add v5.2d, v\rc0\().2d, v\in0\().2d 88 ext v6.16b, v\i2\().16b, v\i3\().16b, #8 90 ext v7.16b, v\i1\().16b, v\i2\().16b, #8 91 add v\i3\().2d, v\i3\().2d, v5.2d 93 ext v5.16b, v\in3\().16b, v\in4\().16b, #8 94 sha512su0 v\in0\().2d, v\in1\().2d 98 sha512su1 v\in0\().2d, v\in2\().2d, v5.2d 100 add v\i4\().2d, v\i1\().2d, v\i3\().2d [all …]
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/linux-6.12.1/drivers/media/platform/sunxi/sun6i-csi/ |
D | sun6i_csi_reg.h | 18 #define SUN6I_CSI_EN_PTN_CYCLE(v) (((v) << 16) & GENMASK(23, 16)) argument 29 #define SUN6I_CSI_IF_CFG_FIELD_DT_PCLK_SHIFT(v) (((v) << 24) & GENMASK(27, 24)) argument 57 #define SUN6I_CSI_CAP_MASK(v) (((v) << 2) & GENMASK(5, 2)) argument 70 #define SUN6I_CSI_CH_CFG_PAD_VAL(v) (((v) << 24) & GENMASK(31, 24)) argument 71 #define SUN6I_CSI_CH_CFG_INPUT_FMT(v) (((v) << 20) & GENMASK(23, 20)) argument 72 #define SUN6I_CSI_CH_CFG_OUTPUT_FMT(v) (((v) << 16) & GENMASK(19, 16)) argument 74 #define SUN6I_CSI_CH_CFG_HFLIP_EN BIT(12) 78 #define SUN6I_CSI_CH_CFG_INPUT_YUV_SEQ(v) (((v) << 8) & GENMASK(9, 8)) argument 96 #define SUN6I_CSI_OUTPUT_FMT_FIELD_RGB565 12 113 #define SUN6I_CSI_OUTPUT_FMT_FRAME_YUV422SP_10 12 [all …]
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/linux-6.12.1/arch/microblaze/lib/ |
D | fastcopy.S | 83 lwi r12, r6, 12 /* t4 = *(s + 12) */ 87 swi r12, r5, 12 /* *(d + 12) = t4 */ 115 lwi r12, r8, 4 /* v = *(as + 4) */ 116 bsrli r9, r12, 8 /* t1 = v >> 8 */ 119 bslli r11, r12, 24 /* h = v << 24 */ 120 lwi r12, r8, 8 /* v = *(as + 8) */ 121 bsrli r9, r12, 8 /* t1 = v >> 8 */ 124 bslli r11, r12, 24 /* h = v << 24 */ 125 lwi r12, r8, 12 /* v = *(as + 12) */ 126 bsrli r9, r12, 8 /* t1 = v >> 8 */ [all …]
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/linux-6.12.1/drivers/net/ethernet/altera/ |
D | altera_tse.h | 49 #define ALTERA_TSE_TX_IPG_LENGTH 12 53 #define GET_BIT_VALUE(v, bit) (((v) >> (bit)) & 0x1) argument 69 #define MAC_CMDCFG_LATE_COL BIT(12) 73 #define MAC_CMDCFG_TX_ADDR_SEL(v) (((v) & 0x7) << 16) argument 85 #define MAC_CMDCFG_TX_ENA_GET(v) GET_BIT_VALUE(v, 0) argument 86 #define MAC_CMDCFG_RX_ENA_GET(v) GET_BIT_VALUE(v, 1) argument 87 #define MAC_CMDCFG_XON_GEN_GET(v) GET_BIT_VALUE(v, 2) argument 88 #define MAC_CMDCFG_ETH_SPEED_GET(v) GET_BIT_VALUE(v, 3) argument 89 #define MAC_CMDCFG_PROMIS_EN_GET(v) GET_BIT_VALUE(v, 4) argument 90 #define MAC_CMDCFG_PAD_EN_GET(v) GET_BIT_VALUE(v, 5) argument [all …]
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/linux-6.12.1/arch/alpha/kernel/ |
D | entry.S | 158 .cfi_rel_offset $12, 24 169 .cfi_restore $12 206 stq $12, 24($sp) 213 .cfi_rel_offset $12, 24 226 ldq $12, 24($sp) 234 .cfi_restore $12 272 stq $12, 96($sp) 300 .cfi_rel_offset $12, 12*8 331 ldq $12, 96($sp) 359 .cfi_restore $12 [all …]
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/linux-6.12.1/drivers/hwmon/ |
D | abituguru3.c | 85 #define ABIT_UGURU3_TEMP_NAMES_LENGTH (13 + 11 + 12 + 13 + 20 + 12 + 16 + 13) 90 #define ABIT_UGURU3_FAN_NAMES_LENGTH (12 + 10 + 12 + 19 + 11 + 15 + 12) 191 { "CPU VTT 1.2V", 3, 0, 10, 1, 0 }, 192 { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 }, 193 { "MCH 2.5V", 5, 0, 20, 1, 0 }, 194 { "ICH 1.05V", 6, 0, 10, 1, 0 }, 195 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 }, 196 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 }, 197 { "ATX +5V", 9, 0, 30, 1, 0 }, 198 { "+3.3V", 10, 0, 20, 1, 0 }, [all …]
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D | intel-m10-bmc-hwmon.c | 53 { 0x144, 0x0, 0x0, 0x0, 0x0, 1, "12V Backplane Voltage" }, 54 { 0x14c, 0x0, 0x0, 0x0, 0x0, 1, "1.2V Voltage" }, 55 { 0x150, 0x0, 0x0, 0x0, 0x0, 1, "12V AUX Voltage" }, 56 { 0x158, 0x0, 0x0, 0x0, 0x0, 1, "1.8V Voltage" }, 57 { 0x15c, 0x0, 0x0, 0x0, 0x0, 1, "3.3V Voltage" }, 62 { 0x148, 0x0, 0x0, 0x0, 0x0, 1, "12V Backplane Current" }, 63 { 0x154, 0x0, 0x0, 0x0, 0x0, 1, "12V AUX Current" }, 113 { 0x1a0, 0x1a4, 0x1a8, 0x0, 0x0, 500, "3.3v Temperature" }, 117 { 0x210, 0x214, 0x218, 0x0, 0x0, 500, "1.8v Temperature" }, 118 { 0x22c, 0x230, 0x234, 0x0, 0x0, 500, "12v Backplane Temperature" }, [all …]
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/linux-6.12.1/drivers/media/platform/nxp/ |
D | imx-pxp.h | 19 #define BF_PXP_CTRL_SFTRST(v) \ argument 20 (((v) << 31) & BM_PXP_CTRL_SFTRST) 22 #define BF_PXP_CTRL_CLKGATE(v) \ argument 23 (((v) << 30) & BM_PXP_CTRL_CLKGATE) 25 #define BF_PXP_CTRL_RSVD4(v) \ argument 26 (((v) << 29) & BM_PXP_CTRL_RSVD4) 28 #define BF_PXP_CTRL_EN_REPEAT(v) \ argument 29 (((v) << 28) & BM_PXP_CTRL_EN_REPEAT) 31 #define BF_PXP_CTRL_ENABLE_ROTATE1(v) \ argument 32 (((v) << 27) & BM_PXP_CTRL_ENABLE_ROTATE1) [all …]
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/linux-6.12.1/include/linux/ |
D | inet.h | 12 * $Id: Space.c,v 0.8.4.5 1992/12/12 19:25:04 bir7 Exp $ 13 * $Id: arp.c,v 0.8.4.6 1993/01/28 22:30:00 bir7 Exp $ 14 * $Id: arp.h,v 0.8.4.6 1993/01/28 22:30:00 bir7 Exp $ 15 * $Id: dev.c,v 0.8.4.13 1993/01/23 18:00:11 bir7 Exp $ 16 * $Id: dev.h,v 0.8.4.7 1993/01/23 18:00:11 bir7 Exp $ 17 * $Id: eth.c,v 0.8.4.4 1993/01/22 23:21:38 bir7 Exp $ 18 * $Id: eth.h,v 0.8.4.1 1992/11/10 00:17:18 bir7 Exp $ 19 * $Id: icmp.c,v 0.8.4.9 1993/01/23 18:00:11 bir7 Exp $ 20 * $Id: icmp.h,v 0.8.4.2 1992/11/15 14:55:30 bir7 Exp $ 21 * $Id: ip.c,v 0.8.4.8 1992/12/12 19:25:04 bir7 Exp $ [all …]
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/linux-6.12.1/arch/riscv/crypto/ |
D | chacha-riscv64-zvkb.S | 39 // The generated code of this file depends on the following RISC-V extensions: 41 // - RISC-V Vector ('V') with VLEN >= 128 42 // - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb') 92 // c += d; b ^= c; b = rol(b, 12); 101 vror.vi \b0, \b0, 32 - 12 102 vror.vi \b1, \b1, 32 - 12 103 vror.vi \b2, \b2, 32 - 12 104 vror.vi \b3, \b3, 32 - 12 167 lw KEY3, 12(KEYP) 175 lw NONCE2, 12(IVP) [all …]
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/linux-6.12.1/include/video/ |
D | gbe.h | 83 #define GET(v, msb, lsb) \ argument 84 ( ((u32)(v) & MASK(msb,lsb)) >> (lsb) ) 85 #define SET(v, f, msb, lsb) \ argument 86 ( (v) = ((v)&~MASK(msb,lsb)) | (( (u32)(f)<<(lsb) ) & MASK(msb,lsb)) ) 88 #define GET_GBE_FIELD(reg, field, v) \ argument 89 GET((v), GBE_##reg##_##field##_MSB, GBE_##reg##_##field##_LSB) 90 #define SET_GBE_FIELD(reg, field, v, f) \ argument 91 SET((v), (f), GBE_##reg##_##field##_MSB, GBE_##reg##_##field##_LSB) 113 #define GBE_VT_XY_Y_LSB 12 120 #define GBE_FP_VDRV_ON_LSB 12 [all …]
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/linux-6.12.1/drivers/staging/media/sunxi/cedrus/ |
D | cedrus_regs.h | 13 #define SHIFT_AND_MASK_BITS(v, h, l) \ argument 14 (((unsigned long)(v) << (l)) & GENMASK(h, l)) 104 #define VE_DEC_MPEG_MP12HDR_TOP_FIELD_FIRST(v) \ argument 105 ((v) ? BIT(7) : 0) 106 #define VE_DEC_MPEG_MP12HDR_FRAME_PRED_FRAME_DCT(v) \ argument 107 ((v) ? BIT(6) : 0) 108 #define VE_DEC_MPEG_MP12HDR_CONCEALMENT_MOTION_VECTORS(v) \ argument 109 ((v) ? BIT(5) : 0) 110 #define VE_DEC_MPEG_MP12HDR_Q_SCALE_TYPE(v) \ argument 111 ((v) ? BIT(4) : 0) [all …]
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/linux-6.12.1/arch/powerpc/boot/ |
D | addnote.c | 68 #define PUT_16BE(off, v)(buf[off] = ((v) >> 8) & 0xff, \ argument 69 buf[(off) + 1] = (v) & 0xff) 70 #define PUT_32BE(off, v)(PUT_16BE((off), (v) >> 16L), PUT_16BE((off) + 2, (v))) argument 71 #define PUT_64BE(off, v)((PUT_32BE((off), (v) >> 32L), \ argument 72 PUT_32BE((off) + 4, (v)))) 78 #define PUT_16LE(off, v) (buf[off] = (v) & 0xff, \ argument 79 buf[(off) + 1] = ((v) >> 8) & 0xff) 80 #define PUT_32LE(off, v) (PUT_16LE((off), (v)), PUT_16LE((off) + 2, (v) >> 16L)) argument 81 #define PUT_64LE(off, v) (PUT_32LE((off), (v)), PUT_32LE((off) + 4, (v) >> 32L)) argument 86 #define PUT_16(off, v) (e_data == ELFDATA2MSB ? PUT_16BE(off, v) : \ argument [all …]
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/linux-6.12.1/drivers/staging/media/atomisp/pci/ |
D | ia_css_frame_format.h | 27 (or YCbCr). The YUV frames come in 4 flavors, determined by how the U and V 52 IA_CSS_FRAME_FORMAT_NV11 = 0, /** 12 bit YUV 411, Y, UV plane */ 53 IA_CSS_FRAME_FORMAT_NV12, /** 12 bit YUV 420, Y, UV plane */ 55 IA_CSS_FRAME_FORMAT_NV12_TILEY, /** 12 bit YUV 420, Intel proprietary tiled format, TileY */ 57 IA_CSS_FRAME_FORMAT_NV21, /** 12 bit YUV 420, Y, VU plane */ 59 IA_CSS_FRAME_FORMAT_YV12, /** 12 bit YUV 420, Y, V, U plane */ 60 IA_CSS_FRAME_FORMAT_YV16, /** 16 bit YUV 422, Y, V, U plane */ 61 IA_CSS_FRAME_FORMAT_YUV420, /** 12 bit YUV 420, Y, U, V plane */ 63 IA_CSS_FRAME_FORMAT_YUV422, /** 16 bit YUV 422, Y, U, V plane */ 67 IA_CSS_FRAME_FORMAT_YUV444, /** 24 bit YUV 444, Y, U, V plane */ [all …]
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