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/linux-6.12.1/Documentation/devicetree/bindings/regulator/
Dmediatek,mt6397-regulator.yaml86 regulator-enable-ramp-delay = <115>;
94 regulator-enable-ramp-delay = <115>;
102 regulator-enable-ramp-delay = <115>;
110 regulator-enable-ramp-delay = <115>;
118 regulator-enable-ramp-delay = <115>;
/linux-6.12.1/drivers/media/usb/gspca/
Dsn9c20x.c297 112, 113, 114, 115, 116, 117, 118, 119,
304 119, 118, 117, 116, 115, 114, 112, 111,
319 -107, -108, -109, -110, -112, -113, -114, -115,
327 -115, -114, -112, -111, -110, -109, -107, -106,
352 -112, -113, -114, -115, -116, -117, -119, -120,
359 -121, -120, -119, -118, -117, -116, -115, -114,
374 106, 108, 109, 110, 112, 113, 114, 115,
382 117, 116, 115, 114, 113, 111, 110, 109,
392 -116, -115, -114, -113, -112, -111, -110, -109,
408 109, 111, 112, 113, 113, 114, 115, 116,
[all …]
/linux-6.12.1/drivers/pinctrl/mediatek/
Dpinctrl-mt8167.c137 MTK_PIN_DRV_GRP(115, 0xd60, 12, 2),
180 MTK_PIN_PUPD_SPEC_SR(115, 0xe20, 2, 1, 0),
228 MTK_PIN_IES_SMT_SPEC(115, 115, 0x920, 1),
278 MTK_PIN_IES_SMT_SPEC(115, 115, 0xA20, 1),
Dpinctrl-mt8516.c137 MTK_PIN_DRV_GRP(115, 0xd60, 12, 2),
180 MTK_PIN_PUPD_SPEC_SR(115, 0xe20, 2, 1, 0),
228 MTK_PIN_IES_SMT_SPEC(115, 115, 0x920, 1),
278 MTK_PIN_IES_SMT_SPEC(115, 115, 0xA20, 1),
Dpinctrl-mt7623.c85 PINS_FIELD16(111, 115, 0xce0, 0x10, 4, 1),
162 PIN_FIELD16(115, 115, 0xd10, 0x10, 3, 1),
243 PINS_FIELD16(111, 115, 0xce0, 0x10, 0, 4),
280 PIN_FIELD16(115, 115, 0xd10, 0x10, 0, 1),
322 PIN_FIELD16(115, 115, 0xd10, 0x10, 1, 1),
364 PIN_FIELD16(115, 115, 0xd10, 0x10, 2, 1),
532 MT7623_PIN(115, "MSDC0_RSTB", 88, DRV_GRP4),
620 MT7623_PIN(203, "PWM0", 115, DRV_GRP1),
813 static int mt7623_msdc0_pins[] = { 111, 112, 113, 114, 115, 116, 117, 118,
833 static int mt7623_nandc_pins[] = { 43, 47, 48, 111, 112, 113, 114, 115,
/linux-6.12.1/drivers/regulator/
D88pm886-regulator.c288 .n_voltages = 115,
302 .n_voltages = 115,
316 .n_voltages = 115,
330 .n_voltages = 115,
/linux-6.12.1/include/dt-bindings/clock/
Drk3036-cru.h38 #define SCLK_SDIO_DRV 115
175 #define SRST_HEVC 115
Drk3128-cru.h40 #define SCLK_SDIO_DRV 115
253 #define SRST_HEVC_CORE 115
Drv1108-cru.h65 #define SCLK_MAC_REFOUT 115
283 #define PRST_HDMI 115
Drk3308-cru.h119 #define SCLK_I2S2_8CH_RX_SRC 115
341 #define SRST_USBPHYPOR 115
Drk3368-cru.h63 #define SCLK_SDIO0_DRV 115
280 #define SRST_MIPIDSI0 115
Dqcom,gcc-ipq8074.h124 #define GCC_PCIE0_PIPE_CLK 115
353 #define GCC_NSSNOC_QOSGEN_REF_ARES 115
Dqcom,ipq5332-gcc.h124 #define GCC_SDCC1_APPS_CLK_SRC 115
298 #define GCC_SNOC_LPASS_CFG_CLK_ARES 115
Drk3288-cru.h70 #define SCLK_SDIO0_DRV 115
309 #define SRST_MIPIDSI0 115
/linux-6.12.1/arch/arm64/boot/dts/ti/
Dk3-am65-wakeup.dtsi73 clocks = <&k3_clks 115 1>;
74 power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>;
/linux-6.12.1/drivers/pinctrl/uniphier/
Dpinctrl-uniphier-sld8.c360 UNIPHIER_PINCTRL_PIN(115, "RXD1", 0,
412 115, UNIPHIER_PIN_DRV_1BIT,
413 115, UNIPHIER_PIN_PULL_DOWN),
520 static const unsigned uart1_pins[] = {114, 115};
530 static const unsigned usb2_pins[] = {114, 115};
542 110, 111, 112, 113, 114, 115, 16, 17, /* PORT9x */
Dpinctrl-uniphier-ld11.c306 UNIPHIER_PINCTRL_PIN(115, "HS0VALOUT", UNIPHIER_PIN_IECTRL_EXIST,
307 115, UNIPHIER_PIN_DRV_1BIT,
308 115, UNIPHIER_PIN_PULL_DOWN),
506 static const unsigned hscout0_ci_pins[] = {113, 114, 115, 116, 117, 118, 119,
509 static const unsigned hscout0_p_pins[] = {113, 114, 115, 116, 117, 118, 119,
575 115, 116, 117, 118, 119, 120, 121, 122, /* PORT14x */
Dpinctrl-uniphier-ld6b.c360 UNIPHIER_PINCTRL_PIN(115, "TXD1", 0,
361 115, UNIPHIER_PIN_DRV_1BIT,
362 115, UNIPHIER_PIN_PULL_UP),
752 static const unsigned i2c2_pins[] = {115, 116};
777 static const unsigned system_bus_cs4_pins[] = {115};
789 static const unsigned uart1_pins[] = {115, 116};
825 109, 110, 111, 112, 113, 114, 115, 116, /* PORT18x */
/linux-6.12.1/drivers/s390/char/
Ddefkeymap.map120 keycode 115 = Ediaeresis three
157 shift control keycode 115 = Incr_Console
/linux-6.12.1/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/
Dbrg.txt19 reg = <119f0 10 115f0 10>;
/linux-6.12.1/sound/isa/gus/
Dgus_tables.h60 127 /* 90 */,123 /* 91 */,119 /* 92 */,115 /* 93 */,111 /* 94 */,
65 37 /* 115 */,33 /* 116 */,30 /* 117 */,27 /* 118 */,24 /* 119 */,
/linux-6.12.1/drivers/cpufreq/
Dlonghaul.h185 115, /* 0101 -> 11.5x */
221 115, /* 0101 -> 11.5x */
259 115, /* 0101 -> 11.5x */
294 115, /* 0101 -> 11.5x */
/linux-6.12.1/include/dt-bindings/pinctrl/
Dmt8365-pinfunc.h722 #define MT8365_PIN_115_I2S_LRCK__FUNC_GPIO115 (MTK_PIN_NO(115) | 0)
723 #define MT8365_PIN_115_I2S_LRCK__FUNC_I2S0_LRCK (MTK_PIN_NO(115) | 1)
724 #define MT8365_PIN_115_I2S_LRCK__FUNC_I2S1_LRCK (MTK_PIN_NO(115) | 2)
725 #define MT8365_PIN_115_I2S_LRCK__FUNC_I2S2_LRCK (MTK_PIN_NO(115) | 3)
726 #define MT8365_PIN_115_I2S_LRCK__FUNC_I2S3_LRCK (MTK_PIN_NO(115) | 4)
727 #define MT8365_PIN_115_I2S_LRCK__FUNC_PWM_B (MTK_PIN_NO(115) | 5)
728 #define MT8365_PIN_115_I2S_LRCK__FUNC_SPDIF_OUT (MTK_PIN_NO(115) | 6)
729 #define MT8365_PIN_115_I2S_LRCK__FUNC_DBG_MON_B18 (MTK_PIN_NO(115) | 7)
/linux-6.12.1/Documentation/userspace-api/media/v4l/
Dmt2110t.svg17 … 482,320 507,246 521,205 523,196 L 593,393 830,1082 1020,1082 604,0 C 559,-115 518,-201 479,-258 4…
29 …riz-adv-x="980" d="M 276,503 C 276,379 302,283 353,216 404,149 479,115 578,115 656,115 719,131 766…
31 …115,560 168,623 221,686 288,724 370,737 L 370,741 C 293,759 233,798 189,858 144,918 122,988 122,10…
34 …61,1282 482,1282 418,1262 369,1221 320,1180 291,1123 283,1049 L 102,1063 C 115,1178 163,1268 246,1…
/linux-6.12.1/drivers/pinctrl/intel/
Dpinctrl-merrifield.c146 PINCTRL_PIN(115, "GP124_UART_0_CTS"),
279 static const unsigned int mrfld_uart0_pins[] = { 115, 116, 117, 118 };
332 TNG_FAMILY(8, 115, 126),

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