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/linux-6.12.1/Documentation/devicetree/bindings/timer/
Dbrcm,bcmbca-timer.yaml39 reg = <0xfffe0200 0x1c>;
/linux-6.12.1/arch/mips/include/asm/mach-bcm63xx/
Dbcm63xx_cpu.h13 #define BCM3368_CPU_ID 0x3368
14 #define BCM6328_CPU_ID 0x6328
15 #define BCM6338_CPU_ID 0x6338
16 #define BCM6345_CPU_ID 0x6345
17 #define BCM6348_CPU_ID 0x6348
18 #define BCM6358_CPU_ID 0x6358
19 #define BCM6362_CPU_ID 0x6362
20 #define BCM6368_CPU_ID 0x6368
91 RSET_DSL_LMEM = 0,
166 #define BCM_3368_DSL_LMEM_BASE (0xdeadbeef)
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/linux-6.12.1/arch/arm/mach-omap1/
Dhardware.h53 ? OMAP_CS3_PHYS : 0; in omap_cs0m_phys()
59 ? 0 : OMAP_CS3_PHYS; in omap_cs3_phys()
64 #define OMAP1_IO_OFFSET 0x00f00000 /* Virtual IO = 0xff0b0000 */
82 #define OMAP_MPU_TIMER1_BASE (0xfffec500)
83 #define OMAP_MPU_TIMER2_BASE (0xfffec600)
84 #define OMAP_MPU_TIMER3_BASE (0xfffec700)
88 #define MPU_TIMER_ST (1 << 0)
97 #define OMAP_MPU_WATCHDOG_BASE (0xfffec800)
98 #define OMAP_WDT_TIMER (OMAP_MPU_WATCHDOG_BASE + 0x0)
99 #define OMAP_WDT_LOAD_TIM (OMAP_MPU_WATCHDOG_BASE + 0x4)
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