Searched +full:0 +full:xfe150000 (Results 1 – 4 of 4) sorted by relevance
11 #define SH7760_I2C0_MMIO 0xFE14000012 #define SH7760_I2C0_MMIOEND 0xFE14003B14 #define SH7760_I2C1_MMIO 0xFE15000015 #define SH7760_I2C1_MMIOEND 0xFE15003B
63 reg = <0xa 0x40000000 0x0 0x00100000>,64 <0xa 0x40100000 0x0 0x00100000>,65 <0x0 0xfe150000 0x0 0x00010000>,66 <0x9 0x00000000 0x0 0x40000000>,67 <0xa 0x40300000 0x0 0x00100000>;75 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH 0>,76 <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH 0>,77 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH 0>,78 <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH 0>,79 <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH 0>,[all …]
12 reg = <0x0 0xfc400000 0x0 0x400000>;13 interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH 0>;32 reg = <0x0 0xfd5b8000 0x0 0x10000>;37 reg = <0x0 0xfd5c0000 0x0 0x100>;42 reg = <0x0 0xfd5cc000 0x0 0x4000>;47 reg = <0x0 0xfd5d4000 0x0 0x4000>;53 reg = <0x4000 0x10>;54 #clock-cells = <0>;58 interrupts = <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH 0>;64 #phy-cells = <0>;[all …]
50 #size-cells = <0>;52 cpu0: cpu@0 {55 reg = <0x0 0x0>;56 clocks = <&scmi_clk 0>;60 i-cache-size = <0x8000>;63 d-cache-size = <0x8000>;72 reg = <0x0 0x100>;76 i-cache-size = <0x8000>;79 d-cache-size = <0x8000>;88 reg = <0x0 0x200>;[all …]