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/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dphy-rockchip-naneng-combphy.yaml121 reg = <0xfdc50000 0x1000>;
126 reg = <0xfdc70000 0x1000>;
131 reg = <0xfe820000 0x100>;
/linux-6.12.1/arch/arm64/boot/dts/rockchip/
Drk356x.dtsi50 #size-cells = <0>;
52 cpu0: cpu@0 {
55 reg = <0x0 0x0>;
56 clocks = <&scmi_clk 0>;
60 i-cache-size = <0x8000>;
63 d-cache-size = <0x8000>;
72 reg = <0x0 0x100>;
76 i-cache-size = <0x8000>;
79 d-cache-size = <0x8000>;
88 reg = <0x0 0x200>;
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