/linux-6.12.1/drivers/media/test-drivers/vivid/ |
D | vivid-osd.c | 39 0x7fff, 0x7fe0, 0x03ff, 0x03e0, 0x7c1f, 0x7c00, 0x001f, 0x0000, 40 0xffff, 0xffe0, 0x83ff, 0x83e0, 0xfc1f, 0xfc00, 0x801f, 0x8000 44 0xffff, 0xffe0, 0x07ff, 0x07e0, 0xf81f, 0xf800, 0x001f, 0x0000, 45 0xffff, 0xffe0, 0x07ff, 0x07e0, 0xf81f, 0xf800, 0x001f, 0x0000 57 for (y = 0; y < dev->display_height; y++) { in vivid_clear_fb() 60 for (x = 0; x < dev->display_width; x++) in vivid_clear_fb() 76 memset(&vblank, 0, sizeof(vblank)); in vivid_fb_ioctl() 79 vblank.count = 0; in vivid_fb_ioctl() 80 vblank.vcount = 0; in vivid_fb_ioctl() 81 vblank.hcount = 0; in vivid_fb_ioctl() [all …]
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/linux-6.12.1/drivers/media/usb/gspca/ |
D | sq930x.c | 35 #define Generic 0 52 .priv = 0}, 61 #define SQ930_CTRL_UCBUS_IO 0x0001 62 #define SQ930_CTRL_I2C_IO 0x0002 63 #define SQ930_CTRL_GPIO 0x0005 64 #define SQ930_CTRL_CAP_START 0x0010 65 #define SQ930_CTRL_CAP_STOP 0x0011 66 #define SQ930_CTRL_SET_EXPOSURE 0x001d 67 #define SQ930_CTRL_RESET 0x001e 68 #define SQ930_CTRL_GET_DEV_INFO 0x001f [all …]
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/linux-6.12.1/include/linux/mfd/madera/ |
D | registers.h | 14 #define MADERA_SOFTWARE_RESET 0x00 15 #define MADERA_HARDWARE_REVISION 0x01 16 #define MADERA_CTRL_IF_CFG_1 0x08 17 #define MADERA_CTRL_IF_CFG_2 0x09 18 #define MADERA_CTRL_IF_CFG_3 0x0A 19 #define MADERA_WRITE_SEQUENCER_CTRL_0 0x16 20 #define MADERA_WRITE_SEQUENCER_CTRL_1 0x17 21 #define MADERA_WRITE_SEQUENCER_CTRL_2 0x18 22 #define MADERA_TONE_GENERATOR_1 0x20 23 #define MADERA_TONE_GENERATOR_2 0x21 [all …]
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/linux-6.12.1/arch/powerpc/boot/dts/fsl/ |
D | mpc8572si-post.dtsi | 39 interrupts = <19 2 0 0>; 42 /* controller at 0x8000 */ 48 bus-range = <0 255>; 50 interrupts = <24 2 0 0>; 52 pcie@0 { 53 reg = <0 0 0 0 0>; 58 interrupts = <24 2 0 0>; 59 interrupt-map-mask = <0xf800 0 0 7>; 62 /* IDSEL 0x0 */ 63 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0 [all …]
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D | mpc8544si-post.dtsi | 39 interrupts = <19 2 0 0>; 42 /* controller at 0x8000 */ 46 interrupts = <24 0x2 0 0>; 47 bus-range = <0 0xff>; 53 /* controller at 0x9000 */ 59 bus-range = <0 255>; 61 interrupts = <25 2 0 0>; 63 pcie@0 { 64 reg = <0 0 0 0 0>; 69 interrupts = <25 2 0 0>; [all …]
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D | p2020si-post.dtsi | 39 interrupts = <19 2 0 0>; 42 /* controller at 0xa000 */ 48 bus-range = <0 255>; 50 interrupts = <26 2 0 0>; 53 pcie@0 { 54 reg = <0 0 0 0 0>; 59 interrupts = <26 2 0 0>; 60 interrupt-map-mask = <0xf800 0 0 7>; 62 /* IDSEL 0x0 */ 63 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 [all …]
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D | p1023rdb.dts | 56 size = <0 0x1000000>; 57 alignment = <0 0x1000000>; 60 size = <0 0x400000>; 61 alignment = <0 0x400000>; 64 size = <0 0x2000000>; 65 alignment = <0 0x2000000>; 70 ranges = <0x0 0xf 0xff000000 0x200000>; 74 ranges = <0x0 0xf 0xff200000 0x200000>; 78 ranges = <0x0 0x0 0xff600000 0x200000>; 83 reg = <0x53>; [all …]
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D | p1022si-post.dtsi | 43 interrupts = <19 2 0 0>, 44 <16 2 0 0>; 47 /* controller at 0x9000 */ 53 bus-range = <0 255>; 55 interrupts = <16 2 0 0>; 57 pcie@0 { 58 reg = <0 0 0 0 0>; 63 interrupts = <16 2 0 0>; 64 interrupt-map-mask = <0xf800 0 0 7>; 66 /* IDSEL 0x0 */ [all …]
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D | mpc8536si-post.dtsi | 39 interrupts = <19 2 0 0>; 42 /* controller at 0x8000 */ 46 interrupts = <24 0x2 0 0>; 47 bus-range = <0 0xff>; 53 /* controller at 0x9000 */ 59 bus-range = <0 255>; 61 interrupts = <25 2 0 0>; 63 pcie@0 { 64 reg = <0 0 0 0 0>; 69 interrupts = <25 2 0 0>; [all …]
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D | mpc8641si-post.dtsi | 12 interrupts = <19 2 0 0>; 20 bus-frequency = <0>; 22 mcm-law@0 { 24 reg = <0x0 0x1000>; 30 reg = <0x1000 0x1000>; 31 interrupts = <17 2 0 0>; 34 /include/ "pq3-i2c-0.dtsi" 36 /include/ "pq3-duart-0.dtsi" 38 interrupts = <28 2 0 0>; 40 /include/ "pq3-dma-0.dtsi" [all …]
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D | p5020si-post.dtsi | 37 alloc-ranges = <0 0 0x10000 0>; 42 alloc-ranges = <0 0 0x10000 0>; 47 alloc-ranges = <0 0 0x10000 0>; 52 interrupts = <25 2 0 0>; 57 /* controller at 0x200000 */ 63 bus-range = <0x0 0xff>; 67 fsl,liodn-reg = <&guts 0x500>; /* PEX1LIODNR */ 68 pcie@0 { 69 reg = <0 0 0 0 0>; 75 interrupt-map-mask = <0xf800 0 0 7>; [all …]
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D | p3041si-post.dtsi | 37 alloc-ranges = <0 0 0x10 0>; 42 alloc-ranges = <0 0 0x10 0>; 47 alloc-ranges = <0 0 0x10 0>; 52 interrupts = <25 2 0 0>; 57 /* controller at 0x200000 */ 63 bus-range = <0x0 0xff>; 67 fsl,liodn-reg = <&guts 0x500>; /* PEX1LIODNR */ 68 pcie@0 { 69 reg = <0 0 0 0 0>; 75 interrupt-map-mask = <0xf800 0 0 7>; [all …]
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D | p1010si-post.dtsi | 39 interrupts = <16 2 0 0 19 2 0 0>; 42 /* controller at 0x9000 */ 48 bus-range = <0 255>; 50 interrupts = <16 2 0 0>; 52 pcie@0 { 53 reg = <0 0 0 0 0>; 58 interrupts = <16 2 0 0>; 59 interrupt-map-mask = <0xf800 0 0 7>; 61 /* IDSEL 0x0 */ 62 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0 [all …]
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D | p1020si-post.dtsi | 39 interrupts = <19 2 0 0>, 40 <16 2 0 0>; 43 /* controller at 0x9000 */ 49 bus-range = <0 255>; 51 interrupts = <16 2 0 0>; 53 pcie@0 { 54 reg = <0 0 0 0 0>; 59 interrupts = <16 2 0 0>; 60 interrupt-map-mask = <0xf800 0 0 7>; 62 /* IDSEL 0x0 */ [all …]
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D | p1021si-post.dtsi | 39 interrupts = <19 2 0 0>, 40 <16 2 0 0>; 43 /* controller at 0x9000 */ 49 bus-range = <0 255>; 51 interrupts = <16 2 0 0>; 53 pcie@0 { 54 reg = <0 0 0 0 0>; 59 interrupts = <16 2 0 0>; 60 interrupt-map-mask = <0xf800 0 0 7>; 62 /* IDSEL 0x0 */ [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/pci/ |
D | intel,ixp4xx-pci.yaml | 54 - const: 0xf800 55 - const: 0 56 - const: 0 73 reg = <0xc0000000 0x1000>; 77 bus-range = <0x00 0xff>; 80 <0x02000000 0 0x48000000 0x48000000 0 0x04000000>, 81 <0x01000000 0 0x00000000 0x4c000000 0 0x00010000>; 83 <0x02000000 0 0x00000000 0x00000000 0 0x04000000>; 86 interrupt-map-mask = <0xf800 0 0 7>; 88 <0x0800 0 0 1 &gpio0 11 3>, /* INT A on slot 1 is irq 11 */ [all …]
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D | faraday,ftpci100.yaml | 18 The host controller appear on the PCI bus with vendor ID 0x159b (Faraday 19 Technology) and product ID 0x4321. 34 interrupt-map-mask = <0xf800 0 0 7>; 36 <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */ 37 <0x4800 0 0 2 &pci_intc 1>, 38 <0x4800 0 0 3 &pci_intc 2>, 39 <0x4800 0 0 4 &pci_intc 3>, 40 <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */ 41 <0x5000 0 0 2 &pci_intc 2>, 42 <0x5000 0 0 3 &pci_intc 3>, [all …]
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D | 83xx-512x-pci.txt | 12 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 14 /* IDSEL 0x0E -mini PCI */ 15 0x7000 0x0 0x0 0x1 &ipic 18 0x8 16 0x7000 0x0 0x0 0x2 &ipic 18 0x8 17 0x7000 0x0 0x0 0x3 &ipic 18 0x8 18 0x7000 0x0 0x0 0x4 &ipic 18 0x8 20 /* IDSEL 0x0F - PCI slot */ 21 0x7800 0x0 0x0 0x1 &ipic 17 0x8 22 0x7800 0x0 0x0 0x2 &ipic 18 0x8 23 0x7800 0x0 0x0 0x3 &ipic 17 0x8 [all …]
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/linux-6.12.1/drivers/video/fbdev/ |
D | sm712.h | 23 #define dac_reg (0x3c8) 24 #define dac_val (0x3c9) 31 #define SIZE_SR00_SR04 (0x04 - 0x00 + 1) 32 #define SIZE_SR10_SR24 (0x24 - 0x10 + 1) 33 #define SIZE_SR30_SR75 (0x75 - 0x30 + 1) 34 #define SIZE_SR80_SR93 (0x93 - 0x80 + 1) 35 #define SIZE_SRA0_SRAF (0xAF - 0xA0 + 1) 36 #define SIZE_GR00_GR08 (0x08 - 0x00 + 1) 37 #define SIZE_AR00_AR14 (0x14 - 0x00 + 1) 38 #define SIZE_CR00_CR18 (0x18 - 0x00 + 1) [all …]
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D | vesafb.c | 28 #define dac_reg (0x3c8) 29 #define dac_val (0x3c9) 63 static int ypan __read_mostly; /* 0..nothing, 1..ypan, 2..ywrap */ 81 : "a" (0x4f07), /* EAX */ in vesafb_pan_display() 82 "b" (0), /* EBX */ in vesafb_pan_display() 87 return 0; in vesafb_pan_display() 104 err = 0; in vesa_setpalette() 117 entry.pad = 0; in vesa_setpalette() 121 : "a" (0x4f09), /* EAX */ in vesa_setpalette() 122 "b" (0), /* EBX */ in vesa_setpalette() [all …]
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D | macfb.c | 38 #define DAC_BASE 0x50f24000 41 #define DAFB_BASE 0xf9800200 44 #define CIVIC_BASE 0x50f30800 47 #define GSC_BASE 0x50F20000 50 #define CSC_BASE 0x50F20000 77 unsigned char addr; /* OFFSET: 0x00 */ 79 unsigned char lut; /* OFFSET: 0x10 */ 81 unsigned char status; /* OFFSET: 0x20 */ 83 unsigned long vbl_addr; /* OFFSET: 0x28 */ 84 unsigned int status2; /* OFFSET: 0x2C */ [all …]
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/linux-6.12.1/drivers/net/ethernet/asix/ |
D | ax88796c_main.h | 26 #define AX88796C_PHY_ID 0x10 34 #define TX_HDR_SOP_DICF 0x8000 35 #define TX_HDR_SOP_CPHI 0x4000 36 #define TX_HDR_SOP_INT 0x2000 37 #define TX_HDR_SOP_MDEQ 0x1000 38 #define TX_HDR_SOP_PKTLEN 0x07FF 39 #define TX_HDR_SOP_SEQNUM 0xF800 40 #define TX_HDR_SOP_PKTLENBAR 0x07FF 42 #define TX_HDR_SEG_FS 0x8000 43 #define TX_HDR_SEG_LS 0x4000 [all …]
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/linux-6.12.1/arch/powerpc/boot/dts/ |
D | mpc8377_wlan.dts | 28 #size-cells = <0>; 30 PowerPC,8377@0 { 32 reg = <0x0>; 37 timebase-frequency = <0>; 38 bus-frequency = <0>; 39 clock-frequency = <0>; 45 reg = <0x00000000 0x20000000>; // 512MB at 0 52 reg = <0xe0005000 0x1000>; 53 interrupts = <77 0x8>; 55 ranges = <0x0 0x0 0xfc000000 0x04000000>; [all …]
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D | mpc8315erdb.dts | 27 #size-cells = <0>; 29 PowerPC,8315@0 { 31 reg = <0x0>; 36 timebase-frequency = <0>; // from bootloader 37 bus-frequency = <0>; // from bootloader 38 clock-frequency = <0>; // from bootloader 44 reg = <0x00000000 0x08000000>; // 128MB at 0 51 reg = <0xe0005000 0x1000>; 52 interrupts = <77 0x8>; 58 ranges = <0x0 0x0 0xfe000000 0x00800000 [all …]
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/linux-6.12.1/drivers/staging/fbtft/ |
D | fb_hx8357d.h | 20 #define HX8357D 0xD 21 #define HX8357B 0xB 26 #define HX8357_SETOSC 0xB0 27 #define HX8357_SETPWR1 0xB1 28 #define HX8357B_SETDISPLAY 0xB2 29 #define HX8357_SETRGB 0xB3 30 #define HX8357D_SETCOM 0xB6 32 #define HX8357B_SETDISPMODE 0xB4 33 #define HX8357D_SETCYC 0xB4 34 #define HX8357B_SETOTP 0xB7 [all …]
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