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/linux-6.12.1/Documentation/devicetree/bindings/soc/dove/
Dpmu.txt24 - #power-domain-cells: must be 0.
35 reg = <0xd0000 0x8000>, <0xd8000 0x8000>;
43 #power-domain-cells = <0>;
44 marvell,pmu_pwr_mask = <0x00000008>;
45 marvell,pmu_iso_mask = <0x00000001>;
50 #power-domain-cells = <0>;
51 marvell,pmu_pwr_mask = <0x00000004>;
52 marvell,pmu_iso_mask = <0x00000002>;
/linux-6.12.1/Documentation/devicetree/bindings/mmc/
Dsdhci-pxa.yaml73 pinctrl-0:
99 reg = <0xd4280800 0x800>;
111 reg = <0xd8000 0x1000>,
112 <0xdc000 0x100>,
113 <0x18454 0x4>;
114 interrupts = <0 25 0x4>;
117 mrvl,clk-delay-cycles = <0x1F>;
/linux-6.12.1/drivers/accel/habanalabs/include/goya/asic_reg/
Dmme_qm_regs.h22 #define mmMME_QM_GLBL_CFG0 0xD8000
24 #define mmMME_QM_GLBL_CFG1 0xD8004
26 #define mmMME_QM_GLBL_PROT 0xD8008
28 #define mmMME_QM_GLBL_ERR_CFG 0xD800C
30 #define mmMME_QM_GLBL_ERR_ADDR_LO 0xD8010
32 #define mmMME_QM_GLBL_ERR_ADDR_HI 0xD8014
34 #define mmMME_QM_GLBL_ERR_WDATA 0xD8018
36 #define mmMME_QM_GLBL_SECURE_PROPS 0xD801C
38 #define mmMME_QM_GLBL_NON_SECURE_PROPS 0xD8020
40 #define mmMME_QM_GLBL_STS0 0xD8024
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/linux-6.12.1/arch/arm/mach-imx/
Dmx3x.h36 #define MX3x_L2CC_BASE_ADDR 0x30000000
42 #define MX3x_AIPS1_BASE_ADDR 0x43f00000
44 #define MX3x_MAX_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x04000)
45 #define MX3x_EVTMON_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x08000)
46 #define MX3x_CLKCTL_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x0c000)
47 #define MX3x_ETB_SLOT4_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x10000)
48 #define MX3x_ETB_SLOT5_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x14000)
49 #define MX3x_ECT_CTIO_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x18000)
50 #define MX3x_I2C_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x80000)
51 #define MX3x_I2C3_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x84000)
[all …]
/linux-6.12.1/Documentation/sound/cards/
Dmultisound.sh77 # 0x250, 0x260 or 0x270. This port can be disabled to have the card
96 # to obtain one with the command `pnpdump 1 0x203' -- this may vary
107 # io base 0x210, irq 5 and mem 0xd8000, and also sets the Kurzweil
108 # synth to 0x330 and irq 9 (may need editing for your system):
110 # (READPORT 0x0203)
115 # (CONFIGURE BVJ0440/-1 (LD 0
116 # (INT 0 (IRQ 5 (MODE +E))) (IO 0 (BASE 0x0210)) (MEM 0 (BASE 0x0d8000))
121 # (IO 0 (BASE 0x0330)) (INT 0 (IRQ 9 (MODE +E)))
140 # If you specify cfg=0x250 for the snd-msnd-pinnacle module, it
143 # on the card to 0x250, 0x260 or 0x270).
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/linux-6.12.1/drivers/gpu/drm/sun4i/
Dsun8i_mixer.h19 #define SUN8I_MIXER_GLOBAL_CTL 0x0
20 #define SUN8I_MIXER_GLOBAL_STATUS 0x4
21 #define SUN8I_MIXER_GLOBAL_DBUFF 0x8
22 #define SUN8I_MIXER_GLOBAL_SIZE 0xc
24 #define SUN8I_MIXER_GLOBAL_CTL_RT_EN BIT(0)
26 #define SUN8I_MIXER_GLOBAL_DBUFF_ENABLE BIT(0)
28 #define DE2_MIXER_UNIT_SIZE 0x6000
29 #define DE3_MIXER_UNIT_SIZE 0x3000
31 #define DE2_BLD_BASE 0x1000
32 #define DE2_CH_BASE 0x2000
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/linux-6.12.1/sound/isa/msnd/
Dmsnd_pinnacle.c95 snd_msnd_DAPQ(chip, 0); in snd_msnd_eval_dsp_msg()
100 chip->playDMAPos = 0; in snd_msnd_eval_dsp_msg()
111 chip->captureDMAPos = 0; in snd_msnd_eval_dsp_msg()
139 ": DSP message %d 0x%02x\n", in snd_msnd_eval_dsp_msg()
151 dev_dbg(chip->card->dev, LOGNAME ": HIMT message %d 0x%02x\n", in snd_msnd_eval_dsp_msg()
175 head = 0; in snd_msnd_interrupt()
198 while (timeout-- > 0) { in snd_msnd_reset_dsp()
200 return 0; in snd_msnd_reset_dsp()
223 if (snd_msnd_reset_dsp(chip, &info) < 0) { in snd_msnd_probe()
232 "I/O 0x%lx-0x%lx, IRQ %d, memory mapped to 0x%lX-0x%lX\n", in snd_msnd_probe()
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/linux-6.12.1/drivers/soc/dove/
Dpmu.c22 #define PMC_SW_RST 0x30
23 #define PMC_IRQ_CAUSE 0x50
24 #define PMC_IRQ_MASK 0x54
26 #define PMU_PWR 0x10
27 #define PMU_ISO 0x58
60 return 0; in pmu_reset_reset()
74 return 0; in pmu_reset_assert()
88 return 0; in pmu_reset_deassert()
174 return 0; in pmu_domain_power_off()
208 return 0; in pmu_domain_power_on()
[all …]
/linux-6.12.1/arch/arm64/boot/dts/marvell/
Darmada-37xx.dtsi35 reg = <0 0x4000000 0 0x200000>;
40 reg = <0 0x4400000 0 0x1000000>;
47 #size-cells = <0>;
48 cpu0: cpu@0 {
51 reg = <0>;
85 /* 32M internal register @ 0xd000_0000 */
86 ranges = <0x0 0x0 0xd0000000 0x2000000>;
90 reg = <0x8300 0x40>;
98 reg = <0xd000 0x1000>;
104 #size-cells = <0>;
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/linux-6.12.1/drivers/net/wireless/mediatek/mt76/mt7915/
Dmmio.c21 [INT_SOURCE_CSR] = 0xd7010,
22 [INT_MASK_CSR] = 0xd7014,
23 [INT1_SOURCE_CSR] = 0xd7088,
24 [INT1_MASK_CSR] = 0xd708c,
25 [INT_MCU_CMD_SOURCE] = 0xd51f0,
26 [INT_MCU_CMD_EVENT] = 0x3108,
27 [WFDMA0_ADDR] = 0xd4000,
28 [WFDMA0_PCIE1_ADDR] = 0xd8000,
29 [WFDMA_EXT_CSR_ADDR] = 0xd7000,
30 [CBTOP1_PHY_END] = 0x77ffffff,
[all …]
/linux-6.12.1/arch/arm/boot/dts/marvell/
Darmada-39x.dtsi32 #size-cells = <0>;
35 cpu@0 {
38 reg = <0>;
59 pcie-mem-aperture = <0xe0000000 0x8000000>;
60 pcie-io-aperture = <0xe8000000 0x100000>;
64 reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
71 ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
75 reg = <0x8000 0x1000>;
78 arm,double-linefill-incr = <0>;
79 arm,double-linefill-wrap = <0>;
[all …]
Ddove.dtsi22 #size-cells = <0>;
24 cpu0: cpu@0 {
28 reg = <0>;
34 marvell,tauros2-cache-features = <0>;
46 #size-cells = <0>;
51 pinctrl-0 = <&pmx_i2cmux_0>;
55 i2c0: i2c@0 {
56 reg = <0>;
58 #size-cells = <0>;
65 #size-cells = <0>;
[all …]
Darmada-38x.dtsi42 pcie-mem-aperture = <0xe0000000 0x8000000>;
43 pcie-io-aperture = <0xe8000000 0x100000>;
47 reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
52 reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
53 ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
56 clocks = <&coreclk 0>;
62 reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
63 ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
66 clocks = <&coreclk 0>;
72 reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
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/linux-6.12.1/drivers/net/wireless/mediatek/mt76/mt7996/
Dregs.h73 #define MT_RRO_TOP_BASE 0xA000
76 #define MT_RRO_BA_BITMAP_BASE0 MT_RRO_TOP(0x8)
77 #define MT_RRO_BA_BITMAP_BASE1 MT_RRO_TOP(0xC)
78 #define WF_RRO_AXI_MST_CFG MT_RRO_TOP(0xB8)
80 #define MT_RRO_ADDR_ARRAY_BASE1 MT_RRO_TOP(0x34)
83 #define MT_RRO_IND_CMD_SIGNATURE_BASE0 MT_RRO_TOP(0x38)
84 #define MT_RRO_IND_CMD_SIGNATURE_BASE1 MT_RRO_TOP(0x3C)
85 #define MT_RRO_IND_CMD_0_CTRL0 MT_RRO_TOP(0x40)
88 #define MT_RRO_PARTICULAR_CFG0 MT_RRO_TOP(0x5C)
89 #define MT_RRO_PARTICULAR_CFG1 MT_RRO_TOP(0x60)
[all …]
/linux-6.12.1/Documentation/sound/
Dalsa-configuration.rst57 (0 = disable debug prints, 1 = normal debug messages,
71 Default: 0
80 the card #0. Similarly, when ``adsp_map=0``, /dev/adsp will be mapped
81 to PCM #0 of the card #0.
83 commas, such like ``dsp_map=0,1``.
98 Default: 0
119 Values: 0 through 31 or negative;
142 appearing card. They can do it by specifying "index=1,0" module
158 the port must be specified. For actual AdLib FM cards it will be 0x388.
170 64:0 OPL2 FM synth OPL2 FM Port
[all …]
/linux-6.12.1/drivers/mtd/nand/raw/
Ddiskonchip.c37 #define CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS 0
43 0xfffc8000, 0xfffca000, 0xfffcc000, 0xfffce000,
44 0xfffd0000, 0xfffd2000, 0xfffd4000, 0xfffd6000,
45 0xfffd8000, 0xfffda000, 0xfffdc000, 0xfffde000,
46 0xfffe0000, 0xfffe2000, 0xfffe4000, 0xfffe6000,
47 0xfffe8000, 0xfffea000, 0xfffec000, 0xfffee000,
49 0xc8000, 0xca000, 0xcc000, 0xce000,
50 0xd0000, 0xd2000, 0xd4000, 0xd6000,
51 0xd8000, 0xda000, 0xdc000, 0xde000,
52 0xe0000, 0xe2000, 0xe4000, 0xe6000,
[all …]
/linux-6.12.1/drivers/scsi/qla2xxx/
Dqla_fw.h14 #define MBS_CHECKSUM_ERROR 0x4010
15 #define MBS_INVALID_PRODUCT_KEY 0x4020
55 #define PDS_PLOGI_PENDING 0x03
56 #define PDS_PLOGI_COMPLETE 0x04
57 #define PDS_PRLI_PENDING 0x05
58 #define PDS_PRLI_COMPLETE 0x06
59 #define PDS_PORT_UNAVAILABLE 0x07
60 #define PDS_PRLO_PENDING 0x09
61 #define PDS_LOGO_PENDING 0x11
62 #define PDS_PRLI2_PENDING 0x12
[all …]
/linux-6.12.1/drivers/phy/microchip/
Dsparx5_serdes.c31 #define SPX5_SERDES_QUIET_MODE_VAL 0x01ef4e0c
34 SPX5_SD10G28_CMU_MAIN = 0,
353 .cfg_en_adv = 0,
355 .cfg_en_dly = 0,
356 .cfg_tap_adv_3_0 = 0,
358 .cfg_tap_dly_4_0 = 0,
359 .cfg_eq_c_force_3_0 = 0xf,
368 .cfg_tap_adv_3_0 = 0,
370 .cfg_tap_dly_4_0 = 0x10,
371 .cfg_eq_c_force_3_0 = 0xf,
[all …]
/linux-6.12.1/drivers/pinctrl/qcom/
Dpinctrl-sm8350.c13 #define REG_SIZE 0x1000
34 .io_reg = REG_SIZE * id + 0x4, \
35 .intr_cfg_reg = REG_SIZE * id + 0x8, \
36 .intr_status_reg = REG_SIZE * id + 0xc, \
37 .intr_target_reg = REG_SIZE * id + 0x8, \
39 .pull_bit = 0, \
42 .in_bit = 0, \
44 .intr_enable_bit = 0, \
45 .intr_status_bit = 0, \
60 .io_reg = 0, \
[all …]
/linux-6.12.1/arch/arm/boot/dts/ti/omap/
Dam33xx-l4.dtsi1 &l4_wkup { /* 0x44c00000 */
4 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_L4_WKUP_CLKCTRL 0>;
6 reg = <0x44c00000 0x800>,
7 <0x44c00800 0x800>,
8 <0x44c01000 0x400>,
9 <0x44c01400 0x400>;
13 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */
14 <0x00100000 0x44d00000 0x100000>, /* segment 1 */
15 <0x00200000 0x44e00000 0x100000>; /* segment 2 */
17 segment@0 { /* 0x44c00000 */
[all …]
Dam437x-l4.dtsi1 &l4_wkup { /* 0x44c00000 */
4 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_L4_WKUP_CLKCTRL 0>;
6 reg = <0x44c00000 0x800>,
7 <0x44c00800 0x800>,
8 <0x44c01000 0x400>,
9 <0x44c01400 0x400>;
13 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */
14 <0x00100000 0x44d00000 0x100000>, /* segment 1 */
15 <0x00200000 0x44e00000 0x100000>; /* segment 2 */
17 segment@0 { /* 0x44c00000 */
[all …]
/linux-6.12.1/drivers/scsi/
Daha152x.c281 (cmd) ? ((cmd)->device->id & 0x0f) : -1, \
282 (cmd) ? ((u8)(cmd)->device->lun & 0x07) : -1
293 #define IRQ_MIN 0
305 not_issued = 0x0001, /* command not yet issued */
306 selecting = 0x0002, /* target is being selected */
307 identified = 0x0004, /* IDENTIFY was sent */
308 disconnected = 0x0008, /* target disconnected */
309 completed = 0x0010, /* target sent COMMAND COMPLETE */
310 aborted = 0x0020, /* ABORT was sent */
311 resetted = 0x0040, /* BUS DEVICE RESET was sent */
[all …]
/linux-6.12.1/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_dump.h22 #define DRV_DUMP_XSTORM_WAITP_ADDRESS 0x2b8a80
23 #define DRV_DUMP_TSTORM_WAITP_ADDRESS 0x1b8a80
24 #define DRV_DUMP_USTORM_WAITP_ADDRESS 0x338a80
25 #define DRV_DUMP_CSTORM_WAITP_ADDRESS 0x238a80
45 #define BNX2X_DUMP_VERSION 0x61111111
65 static const u32 page_vals_e2[] = {0, 128};
68 {0x58000, 4608, DUMP_CHIP_E2, 0x30}
74 static const u32 page_vals_e3[] = {0, 128};
77 {0x58000, 4608, DUMP_CHIP_E3A0 | DUMP_CHIP_E3B0, 0x30}
81 { 0x2000, 1, 0x1f, 0xfff},
[all …]