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/linux-6.12.1/drivers/soc/qcom/
Dqcom_gsbi.c17 #define GSBI_CTRL_REG 0x0000
21 #define TCSR_ADM_CRCI_BASE 0x70
30 0x000003, 0x00000c, 0x000030, 0x0000c0,
31 0x000300, 0x000c00, 0x003000, 0x00c000,
32 0x030000, 0x0c0000, 0x300000, 0xc00000
35 0x000003, 0x00000c, 0x000030, 0x0000c0,
36 0x000300, 0x000c00, 0x003000, 0x00c000,
37 0x030000, 0x0c0000, 0x300000, 0xc00000
48 0x001800, 0x006000, 0x000030, 0x0000c0,
49 0x000300, 0x000400, 0x000000, 0x000000,
[all …]
/linux-6.12.1/arch/powerpc/boot/dts/
DkuroboxHD.dts37 #size-cells = <0>;
41 reg = <0x0>;
44 bus-frequency = <0>; /* Fixed by bootloader */
46 i-cache-size = <0x4000>;
47 d-cache-size = <0x4000>;
53 reg = <0x0 0x4000000>;
61 store-gathering = <0>; /* 0 == off, !0 == on */
62 reg = <0x80000000 0x100000>;
63 ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
64 0xfc000000 0xfc000000 0x100000 /* EUMB */
[all …]
DkuroboxHG.dts37 #size-cells = <0>;
41 reg = <0x0>;
44 bus-frequency = <0>; /* Fixed by bootloader */
46 i-cache-size = <0x4000>;
47 d-cache-size = <0x4000>;
53 reg = <0x0 0x8000000>;
61 store-gathering = <0>; /* 0 == off, !0 == on */
62 reg = <0x80000000 0x100000>;
63 ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
64 0xfc000000 0xfc000000 0x100000 /* EUMB */
[all …]
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt7986a-bananapi-bpi-r3-nor.dtso16 #size-cells = <0>;
18 flash@0 {
20 reg = <0>;
28 partition@0 {
30 reg = <0x0 0x40000>;
36 reg = <0x40000 0x40000>;
41 reg = <0x80000 0x80000>;
46 reg = <0x100000 0x80000>;
52 reg = <0x180000 0xa80000>;
57 reg = <0xc00000 0x1400000>;
/linux-6.12.1/drivers/clk/imx/
Dclk-imx8qxp-lpcg.h11 #define LSIO_PWM_0_LPCG 0x00000
12 #define LSIO_PWM_1_LPCG 0x10000
13 #define LSIO_PWM_2_LPCG 0x20000
14 #define LSIO_PWM_3_LPCG 0x30000
15 #define LSIO_PWM_4_LPCG 0x40000
16 #define LSIO_PWM_5_LPCG 0x50000
17 #define LSIO_PWM_6_LPCG 0x60000
18 #define LSIO_PWM_7_LPCG 0x70000
19 #define LSIO_GPIO_0_LPCG 0x80000
20 #define LSIO_GPIO_1_LPCG 0x90000
[all …]
/linux-6.12.1/arch/arm64/boot/dts/apple/
Dt6002.dtsi70 reg = <0x0 0x800>;
72 cpu-release-addr = <0 0>; /* To be filled by loader */
74 i-cache-size = <0x20000>;
75 d-cache-size = <0x10000>;
84 reg = <0x0 0x801>;
86 cpu-release-addr = <0 0>; /* To be filled by loader */
88 i-cache-size = <0x20000>;
89 d-cache-size = <0x10000>;
98 reg = <0x0 0x10900>;
100 cpu-release-addr = <0 0>; /* To be filled by loader */
[all …]
Dt600x-common.dtsi16 #size-cells = <0>;
59 cpu_e00: cpu@0 {
62 reg = <0x0 0x0>;
64 cpu-release-addr = <0 0>; /* To be filled by loader */
66 i-cache-size = <0x20000>;
67 d-cache-size = <0x10000>;
76 reg = <0x0 0x1>;
78 cpu-release-addr = <0 0>; /* To be filled by loader */
80 i-cache-size = <0x20000>;
81 d-cache-size = <0x10000>;
[all …]
/linux-6.12.1/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phyreg.h10 #define RF_DATA 0x1d4
12 #define rPMAC_Reset 0x100
13 #define rPMAC_TxStart 0x104
14 #define rPMAC_TxLegacySIG 0x108
15 #define rPMAC_TxHTSIG1 0x10c
16 #define rPMAC_TxHTSIG2 0x110
17 #define rPMAC_PHYDebug 0x114
18 #define rPMAC_TxPacketNum 0x118
19 #define rPMAC_TxIdle 0x11c
20 #define rPMAC_TxMACHeader0 0x120
[all …]
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsm6375-sony-xperia-murray-pdx225.dts8 /* PMK8350 is configured to use SID6 instead of 0 */
32 reg = <0 0x85200000 0 0xc00000>;
53 pinctrl-0 = <&vol_down_n>;
68 reg = <0 0x85200000 0 0xc00000>;
74 reg = <0 0xffc40000 0 0xb0000>;
75 record-size = <0x10000>;
76 console-size = <0x60000>;
77 ftrace-size = <0x10000>;
78 pmsg-size = <0x20000>;
88 pinctrl-0 = <&ts_avdd_default>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/marvell/
Darmada-390-db.dts24 reg = <0x00000000 0x80000000>; /* 2 GB */
28 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
29 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
38 reg = <0x50>;
62 pcie@1,0 {
67 pcie@2,0 {
72 pcie@3,0 {
81 pinctrl-0 = <&spi1_pins>;
84 flash@0 {
89 reg = <0>; /* Chip select 0 */
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/display/
Darm,komeda.yaml43 const: 0
67 enum: [ 0, 1 ]
90 - pipeline@0
96 #size-cells = <0>;
98 reg = <0xc00000 0x20000>;
102 iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
107 dp0_pipe0: pipeline@0 {
110 reg = <0>;
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/vce/
Dvce_3_0_sh_mask.h27 #define VCE_STATUS__JOB_BUSY_MASK 0x1
28 #define VCE_STATUS__JOB_BUSY__SHIFT 0x0
29 #define VCE_STATUS__VCPU_REPORT_MASK 0xfe
30 #define VCE_STATUS__VCPU_REPORT__SHIFT 0x1
31 #define VCE_STATUS__UENC_BUSY_MASK 0x100
32 #define VCE_STATUS__UENC_BUSY__SHIFT 0x8
33 #define VCE_STATUS__VCE_CONFIGURATION_MASK 0xc00000
34 #define VCE_STATUS__VCE_CONFIGURATION__SHIFT 0x16
35 #define VCE_STATUS__VCE_INSTANCE_ID_MASK 0x3000000
36 #define VCE_STATUS__VCE_INSTANCE_ID__SHIFT 0x18
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/mtd/
Dingenic,nand.yaml66 reg = <0x13410000 0x10000>;
69 ranges = <1 0 0x1b000000 0x1000000>,
70 <2 0 0x1a000000 0x1000000>,
71 <3 0 0x19000000 0x1000000>,
72 <4 0 0x18000000 0x1000000>,
73 <5 0 0x17000000 0x1000000>,
74 <6 0 0x16000000 0x1000000>;
80 reg = <1 0 0x1000000>;
83 #size-cells = <0>;
94 pinctrl-0 = <&pins_nemc>;
[all …]
/linux-6.12.1/tools/testing/selftests/net/
Dioam6.sh53 # | Ingress ID | 0xffff (default value) |
55 # | Ingress Wide ID | 0xffffffff (default value) |
61 # | Namespace Data | 0xdeadbee0 |
63 # | Namespace Wide Data | 0xcafec0caf00dc0de |
86 # | Namespace Data | 0xdeadbee1 |
88 # | Namespace Wide Data | 0xcafec0caf11dc0de |
107 # | Egress ID | 0xffff (default value) |
109 # | Egress Wide ID | 0xffffffff (default value) |
111 # | Namespace Data | 0xdeadbee2 |
113 # | Namespace Wide Data | 0xcafec0caf22dc0de |
[all …]
/linux-6.12.1/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h36 * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
38 * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
39 * 3. RF register 0x00-2E
44 * 1. Page1(0x100)
46 #define rPMAC_Reset 0x100
47 #define rPMAC_TxStart 0x104
48 #define rPMAC_TxLegacySIG 0x108
49 #define rPMAC_TxHTSIG1 0x10c
50 #define rPMAC_TxHTSIG2 0x110
51 #define rPMAC_PHYDebug 0x114
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Dqcom,sdm845-pinctrl.yaml45 "-hog(-[0-9]+)?$":
66 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9])$"
115 reg = <0x03400000 0xc00000>;
121 gpio-ranges = <&tlmm 0 0 151>;
Dqcom,msm8998-pinctrl.yaml58 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9])$"
122 reg = <0x03400000 0xc00000>;
124 gpio-ranges = <&tlmm 0 0 150>;
129 gpio-reserved-ranges = <0 4>, <81 4>;
/linux-6.12.1/arch/powerpc/platforms/powermac/
Dpci.c57 #define BANDIT_MAGIC 0x50
58 #define BANDIT_COHERENT 0x40
127 | (((unsigned int)(off)) & 0xFCUL))
132 |(((unsigned int)(off)) & 0xFCUL) \
158 offset &= has_uninorth ? 0x07 : 0x03; in macrisc_cfg_map_bus()
179 if (offset >= 0x100) in chaos_map_bus()
190 if ((*vendor == 0x106b) && (*device == 3) && (offset >= 0x10) in chaos_map_bus()
191 && (offset != 0x14) && (offset != 0x18) && (offset <= 0x24)) in chaos_map_bus()
209 hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000); in setup_chaos()
210 hose->cfg_data = ioremap(addr->start + 0xc00000, 0x1000); in setup_chaos()
[all …]
/linux-6.12.1/drivers/media/tuners/
Dmc44s803_priv.h14 SPI or I2C Address : 0xc0-0xc6
28 0A | LNA AGC
29 0B | Data Register Address
30 0C | Regulator Test
31 0D | VCO Test
32 0E | LNA Gain/Input Power
33 0F | ID Bits
41 #define MC44S803_REG_POWER 0
51 #define MC44S803_REG_LNAAGC 0x0A
52 #define MC44S803_REG_DATAREG 0x0B
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/mips/cavium/
Dbootbus.txt52 - cavium,pages: A cell specifying the PAGES parameter (0 = 8 bytes, 1
71 reg = <0x11800 0x00000000 0x0 0x200>;
76 ranges = <0 0 0x0 0x1f400000 0xc00000>,
77 <1 0 0x10000 0x30000000 0>,
78 <2 0 0x10000 0x40000000 0>,
79 <3 0 0x10000 0x50000000 0>,
80 <4 0 0x0 0x1d020000 0x10000>,
81 <5 0 0x0 0x1d040000 0x10000>,
82 <6 0 0x0 0x1d050000 0x10000>,
83 <7 0 0x10000 0x90000000 0>;
[all …]
/linux-6.12.1/sound/drivers/vx/
Dvx_cmd.c19 [CMD_VERSION] = { 0x010000, 2, RMH_SSIZE_FIXED, 1 },
20 [CMD_SUPPORTED] = { 0x020000, 1, RMH_SSIZE_FIXED, 2 },
21 [CMD_TEST_IT] = { 0x040000, 1, RMH_SSIZE_FIXED, 1 },
22 [CMD_SEND_IRQA] = { 0x070001, 1, RMH_SSIZE_FIXED, 0 },
23 [CMD_IBL] = { 0x080000, 1, RMH_SSIZE_FIXED, 4 },
24 [CMD_ASYNC] = { 0x0A0000, 1, RMH_SSIZE_ARG, 0 },
25 [CMD_RES_PIPE] = { 0x400000, 1, RMH_SSIZE_FIXED, 0 },
26 [CMD_FREE_PIPE] = { 0x410000, 1, RMH_SSIZE_FIXED, 0 },
27 [CMD_CONF_PIPE] = { 0x42A101, 2, RMH_SSIZE_FIXED, 0 },
28 [CMD_ABORT_CONF_PIPE] = { 0x42A100, 2, RMH_SSIZE_FIXED, 0 },
[all …]
/linux-6.12.1/arch/arm64/boot/dts/amd/
Delba.dtsi20 #clock-cells = <0>;
25 #clock-cells = <0>;
30 #clock-cells = <0>;
35 #clock-cells = <0>;
64 reg = <0x0 0x400 0x0 0x100>;
67 #size-cells = <0>;
75 reg = <0x0 0x1400 0x0 0x100>;
83 reg = <0x0 0x2400 0x0 0x400>,
84 <0x0 0x7fff0000 0x0 0x1000>;
86 #size-cells = <0>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/st/
Dspear320-hmi.dts18 reg = <0 0x40000000>;
25 pinctrl-0 = <&state_default>;
102 partition@0 {
104 reg = <0x0 0x80000>;
108 reg = <0x80000 0x140000>;
112 reg = <0x1C0000 0x40000>;
116 reg = <0x200000 0x40000>;
120 reg = <0x240000 0xC00000>;
124 reg = <0xE40000 0x0>;
131 #size-cells = <0>;
[all …]
/linux-6.12.1/include/linux/ssb/
Dssb_driver_extif.h24 #define SSB_EXTIF_PCMCIA_IOBASE(x) ((x) + 0x100000)
25 #define SSB_EXTIF_PCMCIA_CFGBASE(x) ((x) + 0x200000)
26 #define SSB_EXTIF_CFGIF_BASE(x) ((x) + 0x800000)
27 #define SSB_EXTIF_FLASH_BASE(x) ((x) + 0xc00000)
47 #define SSB_EXTIF_CTL 0x0000
48 #define SSB_EXTIF_CTL_UARTEN (1 << 0) /* UART enable */
49 #define SSB_EXTIF_EXTSTAT 0x0004
50 #define SSB_EXTIF_EXTSTAT_EMODE (1 << 0) /* Endian mode (ro) */
53 #define SSB_EXTIF_PCMCIA_CFG 0x0010
54 #define SSB_EXTIF_PCMCIA_MEMWAIT 0x0014
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_2_sh_mask.h27 #define UVD_SEMA_ADDR_LOW__ADDR_22_3_MASK 0xfffff
28 #define UVD_SEMA_ADDR_LOW__ADDR_22_3__SHIFT 0x0
29 #define UVD_SEMA_ADDR_HIGH__ADDR_42_23_MASK 0xfffff
30 #define UVD_SEMA_ADDR_HIGH__ADDR_42_23__SHIFT 0x0
31 #define UVD_SEMA_CMD__REQ_CMD_MASK 0xf
32 #define UVD_SEMA_CMD__REQ_CMD__SHIFT 0x0
33 #define UVD_SEMA_CMD__WR_PHASE_MASK 0x30
34 #define UVD_SEMA_CMD__WR_PHASE__SHIFT 0x4
35 #define UVD_SEMA_CMD__MODE_MASK 0x40
36 #define UVD_SEMA_CMD__MODE__SHIFT 0x6
[all …]

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