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/linux-6.12.1/arch/arm64/boot/dts/ti/
Dk3-am62p.dtsi53 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
54 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
55 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
56 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
57 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
58 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
59 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
60 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
61 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
62 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
Dk3-am62p-j722s-common-wakeup.dtsi11 reg = <0x00 0x43000000 0x00 0x20000>;
14 ranges = <0x00 0x00 0x43000000 0x20000>;
19 reg = <0x14 0x4>;
25 reg = <0x200 0x8>;
30 reg = <0x4008 0x4>;
35 reg = <0x4018 0x4>;
41 reg = <0x00 0x2b300000 0x00 0x100>;
44 clocks = <&k3_clks 114 0>;
51 reg = <0x00 0x2b200000 0x00 0x100>;
54 #size-cells = <0>;
[all …]
Dk3-am62a.dtsi54 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
55 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
56 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
57 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
58 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
59 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
60 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
61 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
62 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
63 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
Dk3-j722s.dtsi24 #size-cells = <0>;
46 cpu0: cpu@0 {
48 reg = <0x000>;
51 i-cache-size = <0x8000>;
54 d-cache-size = <0x8000>;
58 clocks = <&k3_clks 135 0>;
63 reg = <0x001>;
66 i-cache-size = <0x8000>;
69 d-cache-size = <0x8000>;
73 clocks = <&k3_clks 136 0>;
[all …]
Dk3-am64.dtsi54 ranges = <0x00 0x000f4000 0x00 0x000f4000 0x00 0x000002d0>, /* PINCTRL */
55 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
56 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
57 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
58 <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */
59 <0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */
60 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
61 <0x00 0x0d000000 0x00 0x0d000000 0x00 0x00800000>, /* PCIE_CORE */
62 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x00000100>, /* Main RTI0 */
63 <0x00 0x0e010000 0x00 0x0e010000 0x00 0x00000100>, /* Main RTI1 */
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/pci/
Dmicrochip,pcie-host.yaml41 0-3
45 pattern: '^fic[0-3]$'
64 reg = <0x0 0x70000000 0x0 0x08000000>,
65 <0x0 0x43000000 0x0 0x00010000>;
72 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
73 interrupt-map = <0 0 0 1 &pcie_intc0 0>,
74 <0 0 0 2 &pcie_intc0 1>,
75 <0 0 0 3 &pcie_intc0 2>,
76 <0 0 0 4 &pcie_intc0 3>;
80 bus-range = <0x00 0x7f>;
[all …]
/linux-6.12.1/drivers/iio/proximity/
Daw96103.c23 #define AW96103_CHIP_ID 0xa961
30 #define AW96103_REG_SCANCTRL0 0x0000
31 #define AW96103_REG_STAT0 0x0090
32 #define AW96103_REG_BLFILT_CH0 0x00A8
33 #define AW96103_REG_BLRSTRNG_CH0 0x00B4
34 #define AW96103_REG_DIFF_CH0 0x0240
35 #define AW96103_REG_FWVER2 0x0410
36 #define AW96103_REG_CMD 0xF008
37 #define AW96103_REG_IRQSRC 0xF080
38 #define AW96103_REG_IRQEN 0xF084
[all …]
/linux-6.12.1/drivers/net/ethernet/dec/tulip/
Dpnic.c23 u32 phy_reg = ioread32(ioaddr + 0xB8); in pnic_do_nway()
26 if (phy_reg & 0x78000000) { /* Ignore baseT4 */ in pnic_do_nway()
27 if (phy_reg & 0x20000000) dev->if_port = 5; in pnic_do_nway()
28 else if (phy_reg & 0x40000000) dev->if_port = 3; in pnic_do_nway()
29 else if (phy_reg & 0x10000000) dev->if_port = 4; in pnic_do_nway()
30 else if (phy_reg & 0x08000000) dev->if_port = 0; in pnic_do_nway()
32 new_csr6 = (dev->if_port & 1) ? 0x01860000 : 0x00420000; in pnic_do_nway()
33 iowrite32(0x32 | (dev->if_port & 1), ioaddr + CSR12); in pnic_do_nway()
35 iowrite32(0x1F868, ioaddr + 0xB8); in pnic_do_nway()
36 if (phy_reg & 0x30000000) { in pnic_do_nway()
[all …]
/linux-6.12.1/arch/arm64/boot/dts/renesas/
Dr8a77965-ulcb.dts20 reg = <0x0 0x48000000 0x0 0x78000000>;
31 clock-names = "du.0", "du.1", "du.3",
32 "dclkin.0", "dclkin.1", "dclkin.3";
Dr8a77965-salvator-x.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
30 clock-names = "du.0", "du.1", "du.3",
31 "dclkin.0", "dclkin.1", "dclkin.3";
Dr8a77965-salvator-xs.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
30 clock-names = "du.0", "du.1", "du.3",
31 "dclkin.0", "dclkin.1", "dclkin.3";
Dr8a77960-salvator-xs.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x6 0x00000000 0x0 0x80000000>;
35 clock-names = "du.0", "du.1", "du.2",
36 "dclkin.0", "dclkin.1", "dclkin.2";
Dr8a774a1-hihope-rzg2m.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x6 0x00000000 0x0 0x80000000>;
35 clock-names = "du.0", "du.1", "du.2",
36 "dclkin.0", "dclkin.1", "dclkin.2";
Dr8a77960-salvator-x.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x6 0x00000000 0x0 0x80000000>;
35 clock-names = "du.0", "du.1", "du.2",
36 "dclkin.0", "dclkin.1", "dclkin.2";
Dr8a774e1-hihope-rzg2h.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x5 0x00000000 0x0 0x80000000>;
35 clock-names = "du.0", "du.1", "du.3",
36 "dclkin.0", "dclkin.1", "dclkin.3";
Dr8a774a1-hihope-rzg2m-rev2.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x6 0x00000000 0x0 0x80000000>;
35 clock-names = "du.0", "du.1", "du.2",
36 "dclkin.0", "dclkin.1", "dclkin.2";
Dr8a779m5-salvator-xs.dts23 reg = <0x0 0x48000000 0x0 0x78000000>;
34 clock-names = "du.0", "du.1", "du.3",
35 "dclkin.0", "dclkin.1", "dclkin.3";
Dr8a77961-ulcb.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x4 0x80000000 0x0 0x80000000>;
29 reg = <0x6 0x00000000 0x1 0x00000000>;
40 clock-names = "du.0", "du.1", "du.2",
41 "dclkin.0", "dclkin.1", "dclkin.2";
Dr8a774b1-hihope-rzg2n.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x4 0x80000000 0x0 0x80000000>;
35 clock-names = "du.0", "du.1", "du.3",
36 "dclkin.0", "dclkin.1", "dclkin.3";
Dr8a774b1-hihope-rzg2n-rev2.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x4 0x80000000 0x0 0x80000000>;
35 clock-names = "du.0", "du.1", "du.3",
36 "dclkin.0", "dclkin.1", "dclkin.3";
Dr8a77961-salvator-xs.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x4 0x80000000 0x0 0x80000000>;
29 reg = <0x6 0x00000000 0x1 0x00000000>;
40 clock-names = "du.0", "du.1", "du.2",
41 "dclkin.0", "dclkin.1", "dclkin.2";
Dr8a779m3-ulcb.dts22 reg = <0x0 0x48000000 0x0 0x78000000>;
27 reg = <0x4 0x80000000 0x0 0x80000000>;
32 reg = <0x6 0x00000000 0x1 0x00000000>;
43 clock-names = "du.0", "du.1", "du.2",
44 "dclkin.0", "dclkin.1", "dclkin.2";
Dr8a779m3-salvator-xs.dts23 reg = <0x0 0x48000000 0x0 0x78000000>;
28 reg = <0x4 0x80000000 0x0 0x80000000>;
33 reg = <0x6 0x00000000 0x1 0x00000000>;
44 clock-names = "du.0", "du.1", "du.2",
45 "dclkin.0", "dclkin.1", "dclkin.2";
/linux-6.12.1/arch/sparc/include/asm/
Dpcr.h19 #define PCR_PIC_PRIV 0x00000001 /* PIC access is privileged */
20 #define PCR_STRACE 0x00000002 /* Trace supervisor events */
21 #define PCR_UTRACE 0x00000004 /* Trace user events */
22 #define PCR_N2_HTRACE 0x00000008 /* Trace hypervisor events */
23 #define PCR_N2_TOE_OV0 0x00000010 /* Trap if PIC 0 overflows */
24 #define PCR_N2_TOE_OV1 0x00000020 /* Trap if PIC 1 overflows */
25 #define PCR_N2_MASK0 0x00003fc0
27 #define PCR_N2_SL0 0x0003c000
29 #define PCR_N2_OV0 0x00040000
30 #define PCR_N2_MASK1 0x07f80000
[all …]
/linux-6.12.1/arch/arm/mach-footbridge/include/mach/
Dhardware.h13 * 0xff800000 0x40000000 1MB X-Bus
14 * 0xff000000 0x7c000000 1MB PCI I/O space
15 * 0xfe000000 0x42000000 1MB CSR
16 * 0xfd000000 0x78000000 1MB Outbound write flush (not supported)
17 * 0xfc000000 0x79000000 1MB PCI IACK/special space
18 * 0xfb000000 0x7a000000 16MB PCI Config type 1
19 * 0xfa000000 0x7b000000 16MB PCI Config type 0
20 * 0xf9000000 0x50000000 1MB Cache flush
21 * 0xf0000000 0x80000000 16MB ISA memory
24 #define XBUS_SIZE 0x00100000
[all …]

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