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/linux-6.12.1/Documentation/devicetree/bindings/pci/
D83xx-512x-pci.txt12 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
14 /* IDSEL 0x0E -mini PCI */
15 0x7000 0x0 0x0 0x1 &ipic 18 0x8
16 0x7000 0x0 0x0 0x2 &ipic 18 0x8
17 0x7000 0x0 0x0 0x3 &ipic 18 0x8
18 0x7000 0x0 0x0 0x4 &ipic 18 0x8
20 /* IDSEL 0x0F - PCI slot */
21 0x7800 0x0 0x0 0x1 &ipic 17 0x8
22 0x7800 0x0 0x0 0x2 &ipic 18 0x8
23 0x7800 0x0 0x0 0x3 &ipic 17 0x8
[all …]
/linux-6.12.1/drivers/gpu/drm/radeon/
Devergreen_reg.h28 #define TN_SMC_IND_INDEX_0 0x200
29 #define TN_SMC_IND_DATA_0 0x204
32 #define EVERGREEN_PIF_PHY0_INDEX 0x8
33 #define EVERGREEN_PIF_PHY0_DATA 0xc
34 #define EVERGREEN_PIF_PHY1_INDEX 0x10
35 #define EVERGREEN_PIF_PHY1_DATA 0x14
36 #define EVERGREEN_MM_INDEX_HI 0x18
38 #define EVERGREEN_VGA_MEMORY_BASE_ADDRESS 0x310
39 #define EVERGREEN_VGA_MEMORY_BASE_ADDRESS_HIGH 0x324
40 #define EVERGREEN_D3VGA_CONTROL 0x3e0
[all …]
/linux-6.12.1/arch/arm/boot/dts/intel/ixp/
Dintel-ixp42x-ixdpg425.dts26 memory@0 {
29 reg = <0x00000000 0x02000000>;
43 flash@0,0 {
50 reg = <0 0x00000000 0x1000000>;
58 fis-index-block = <0x7f>;
72 interrupt-map-mask = <0xf800 0 0 7>;
75 <0x6000 0 0 1 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 12 is irq 7 */
76 <0x6000 0 0 2 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 12 is irq 7 */
77 <0x6000 0 0 3 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 12 is irq 7 */
78 <0x6000 0 0 4 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 12 is irq 7 */
[all …]
Dintel-ixp42x-freecom-fsg-3.dts19 memory@0 {
22 reg = <0x00000000 0x4000000>;
65 #size-cells = <0>;
76 reg = <0x28>;
80 reg = <0x6f>;
86 flash@0,0 {
92 reg = <0 0x00000000 0x400000>;
96 /* Eraseblock at 0x3e0000 */
97 fis-index-block = <0x1f>;
102 syscon@2,0 {
[all …]
Dintel-ixp42x-goramo-multilink.dts25 memory@0 {
31 reg = <0x00000000 0x4000000>;
53 cp-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
68 flash@0,0 {
74 reg = <0 0x00000000 0x1000000>;
78 /* Eraseblock at 0x0fe0000 */
79 fis-index-block = <0x7f>;
93 interrupt-map-mask = <0xf800 0 0 7>;
96 <0x5800 0 0 1 &gpio0 4 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 11 is irq 4 */
97 <0x5800 0 0 2 &gpio0 4 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 11 is irq 4 */
[all …]
/linux-6.12.1/arch/powerpc/boot/dts/
Dstorcenter.dts30 #size-cells = <0>;
32 PowerPC,8241@0 {
34 reg = <0>;
37 bus-frequency = <0>; /* from bootwrapper */
47 reg = <0x00000000 0x04000000>; /* 64MB @ 0x0 */
55 store-gathering = <0>; /* 0 == off, !0 == on */
56 ranges = <0x0 0xfc000000 0x100000>;
57 reg = <0xfc000000 0x100000>; /* EUMB */
58 bus-frequency = <0>; /* fixed by loader */
62 #size-cells = <0>;
[all …]
DkuroboxHD.dts37 #size-cells = <0>;
41 reg = <0x0>;
44 bus-frequency = <0>; /* Fixed by bootloader */
46 i-cache-size = <0x4000>;
47 d-cache-size = <0x4000>;
53 reg = <0x0 0x4000000>;
61 store-gathering = <0>; /* 0 == off, !0 == on */
62 reg = <0x80000000 0x100000>;
63 ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
64 0xfc000000 0xfc000000 0x100000 /* EUMB */
[all …]
DkuroboxHG.dts37 #size-cells = <0>;
41 reg = <0x0>;
44 bus-frequency = <0>; /* Fixed by bootloader */
46 i-cache-size = <0x4000>;
47 d-cache-size = <0x4000>;
53 reg = <0x0 0x8000000>;
61 store-gathering = <0>; /* 0 == off, !0 == on */
62 reg = <0x80000000 0x100000>;
63 ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
64 0xfc000000 0xfc000000 0x100000 /* EUMB */
[all …]
Dmpc8313erdb.dts26 #size-cells = <0>;
28 PowerPC,8313@0 {
30 reg = <0x0>;
35 timebase-frequency = <0>; // from bootloader
36 bus-frequency = <0>; // from bootloader
37 clock-frequency = <0>; // from bootloader
43 reg = <0x00000000 0x08000000>; // 128MB at 0
50 reg = <0xe0005000 0x1000>;
51 interrupts = <77 0x8>;
57 ranges = <0x0 0x0 0xfe000000 0x00800000
[all …]
Dstx_gp3_8560.dts27 #size-cells = <0>;
29 PowerPC,8560@0 {
31 reg = <0>;
36 timebase-frequency = <0>;
37 bus-frequency = <0>;
38 clock-frequency = <0>;
45 reg = <0x00000000 0x10000000>;
52 ranges = <0 0xfdf00000 0x100000>;
53 bus-frequency = <0>;
56 ecm-law@0 {
[all …]
Dmpc8315erdb.dts27 #size-cells = <0>;
29 PowerPC,8315@0 {
31 reg = <0x0>;
36 timebase-frequency = <0>; // from bootloader
37 bus-frequency = <0>; // from bootloader
38 clock-frequency = <0>; // from bootloader
44 reg = <0x00000000 0x08000000>; // 128MB at 0
51 reg = <0xe0005000 0x1000>;
52 interrupts = <77 0x8>;
58 ranges = <0x0 0x0 0xfe000000 0x00800000
[all …]
/linux-6.12.1/tools/testing/vma/
Dvma.c36 } while (0)
193 int count = 0; in cleanup_mm()
198 vma_iter_set(vmi, 0); in cleanup_mm()
205 mm->map_count = 0; in cleanup_mm()
231 struct vm_area_struct *vma_left = alloc_vma(&mm, 0, 0x1000, 0, flags); in test_simple_merge()
232 struct vm_area_struct *vma_right = alloc_vma(&mm, 0x2000, 0x3000, 2, flags); in test_simple_merge()
233 VMA_ITERATOR(vmi, &mm, 0x1000); in test_simple_merge()
237 .start = 0x1000, in test_simple_merge()
238 .end = 0x2000, in test_simple_merge()
249 ASSERT_EQ(vma->vm_start, 0); in test_simple_merge()
[all …]
/linux-6.12.1/drivers/gpu/drm/etnaviv/
Detnaviv_hwdb.c10 .model = 0x400,
11 .revision = 0x4652,
12 .product_id = 0x70001,
13 .customer_id = 0x100,
14 .eco_id = 0,
19 .nn_core_count = 0,
25 .buffer_size = 0,
27 .features = 0xa0e9e004,
28 .minor_features0 = 0xe1299fff,
29 .minor_features1 = 0xbe13b219,
[all …]
/linux-6.12.1/sound/soc/codecs/
Drt286.h14 #define RT286_AUDIO_FUNCTION_GROUP 0x01
15 #define RT286_DAC_OUT1 0x02
16 #define RT286_DAC_OUT2 0x03
17 #define RT286_ADC_IN1 0x09
18 #define RT286_ADC_IN2 0x08
19 #define RT286_MIXER_IN 0x0b
20 #define RT286_MIXER_OUT1 0x0c
21 #define RT286_MIXER_OUT2 0x0d
22 #define RT286_DMIC1 0x12
23 #define RT286_DMIC2 0x13
[all …]
Drt298.h14 #define RT298_AUDIO_FUNCTION_GROUP 0x01
15 #define RT298_DAC_OUT1 0x02
16 #define RT298_DAC_OUT2 0x03
17 #define RT298_DIG_CVT 0x06
18 #define RT298_ADC_IN1 0x09
19 #define RT298_ADC_IN2 0x08
20 #define RT298_MIXER_IN 0x0b
21 #define RT298_MIXER_OUT1 0x0c
22 #define RT298_MIXER_OUT2 0x0d
23 #define RT298_DMIC1 0x12
[all …]
/linux-6.12.1/drivers/accel/habanalabs/include/gaudi/asic_reg/
Dgaudi_blocks.h16 #define mmNIC0_PHY0_BASE 0x0ull
17 #define NIC0_PHY0_MAX_OFFSET 0x9F13
18 #define mmMME0_ACC_BASE 0x7FFC020000ull
19 #define MME0_ACC_MAX_OFFSET 0x5C00
20 #define MME0_ACC_SECTION 0x20000
21 #define mmMME0_SBAB_BASE 0x7FFC040000ull
22 #define MME0_SBAB_MAX_OFFSET 0x5800
23 #define MME0_SBAB_SECTION 0x1000
24 #define mmMME0_PRTN_BASE 0x7FFC041000ull
25 #define MME0_PRTN_MAX_OFFSET 0x5000
[all …]
/linux-6.12.1/arch/powerpc/boot/dts/fsl/
Dpq3-espi-0.dtsi2 * PQ3 eSPI device tree stub [ controller @ offset 0x7000 ]
37 #size-cells = <0>;
39 reg = <0x7000 0x1000>;
40 interrupts = <59 0x2 0 0>;
/linux-6.12.1/sound/pci/ac97/
Dac97_proc.c24 int header = 0, function; in snd_ac97_proc_read_functions()
36 for (function = 0; function < 12; ++function) { in snd_ac97_proc_read_functions()
39 if (!(info & 0x0001)) in snd_ac97_proc_read_functions()
48 (info & 0x8000 ? -1 : 1) * ((info & 0x7000) >> 12) * 3 / 2, in snd_ac97_proc_read_functions()
49 ((info & 0x0800) >> 11) * 5, in snd_ac97_proc_read_functions()
50 info & 0x0400 ? 'X' : '-', in snd_ac97_proc_read_functions()
51 (info & 0x03e0) >> 5, in snd_ac97_proc_read_functions()
58 /* 0 */ "No 3D Stereo Enhancement",
101 snd_ac97_get_name(NULL, ac97->id, name, 0); in snd_ac97_proc_read_main()
104 if ((ac97->scaps & AC97_SCAP_AUDIO) == 0) in snd_ac97_proc_read_main()
[all …]
/linux-6.12.1/drivers/net/dsa/mv88e6xxx/
Dglobal2.h16 /* Offset 0x00: Interrupt Source Register */
17 #define MV88E6XXX_G2_INT_SRC 0x00
18 #define MV88E6XXX_G2_INT_SRC_WDOG 0x8000
19 #define MV88E6XXX_G2_INT_SRC_JAM_LIMIT 0x4000
20 #define MV88E6XXX_G2_INT_SRC_DUPLEX_MISMATCH 0x2000
21 #define MV88E6XXX_G2_INT_SRC_WAKE_EVENT 0x1000
22 #define MV88E6352_G2_INT_SRC_SERDES 0x0800
23 #define MV88E6352_G2_INT_SRC_PHY 0x001f
24 #define MV88E6390_G2_INT_SRC_PHY 0x07fe
28 /* Offset 0x01: Interrupt Mask Register */
[all …]
Dglobal1.h16 /* Offset 0x00: Switch Global Status Register */
17 #define MV88E6XXX_G1_STS 0x00
18 #define MV88E6352_G1_STS_PPU_STATE 0x8000
19 #define MV88E6185_G1_STS_PPU_STATE_MASK 0xc000
20 #define MV88E6185_G1_STS_PPU_STATE_DISABLED_RST 0x0000
21 #define MV88E6185_G1_STS_PPU_STATE_INITIALIZING 0x4000
22 #define MV88E6185_G1_STS_PPU_STATE_DISABLED 0x8000
23 #define MV88E6185_G1_STS_PPU_STATE_POLLING 0xc000
24 #define MV88E6XXX_G1_STS_INIT_READY 0x0800
34 #define MV88E6XXX_G1_STS_IRQ_EEPROM_DONE 0
[all …]
/linux-6.12.1/drivers/net/ethernet/dec/tulip/
D21142.c21 static u16 t21142_csr13[] = { 0x0001, 0x0009, 0x0009, 0x0000, 0x0001, };
22 u16 t21142_csr14[] = { 0xFFFF, 0x0705, 0x0705, 0x0000, 0x7F3D, };
23 static u16 t21142_csr15[] = { 0x0008, 0x0006, 0x000E, 0x0008, 0x0008, };
36 int new_csr6 = 0; in t21142_media_task()
40 if ((csr14 & 0x80) && (csr12 & 0x7000) != 0x5000) in t21142_media_task()
46 if (tulip_check_duplex(dev) < 0) { in t21142_media_task()
70 } else if ((csr12 & 0x7000) != 0x5000) { in t21142_media_task()
77 new_csr6 = 0x82420000; in t21142_media_task()
78 dev->if_port = 0; in t21142_media_task()
79 iowrite32(0, ioaddr + CSR13); in t21142_media_task()
[all …]
/linux-6.12.1/drivers/mfd/
Dwm8350-regmap.c23 { 0xFFFF, 0xFFFF, 0x0000 }, /* R0 - Reset/ID */
24 { 0x7CFF, 0x0C00, 0x0000 }, /* R1 - ID */
25 { 0x007F, 0x0000, 0x0000 }, /* R2 - ROM Mask ID */
26 { 0xBE3B, 0xBE3B, 0x8000 }, /* R3 - System Control 1 */
27 { 0xFEF7, 0xFEF7, 0xF800 }, /* R4 - System Control 2 */
28 { 0x80FF, 0x80FF, 0x8000 }, /* R5 - System Hibernate */
29 { 0xFB0E, 0xFB0E, 0x0000 }, /* R6 - Interface Control */
30 { 0x0000, 0x0000, 0x0000 }, /* R7 */
31 { 0xE537, 0xE537, 0xFFFF }, /* R8 - Power mgmt (1) */
32 { 0x0FF3, 0x0FF3, 0xFFFF }, /* R9 - Power mgmt (2) */
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/thermal/
Dspear-thermal.txt12 reg = <0xfc000000 0x1000>;
13 st,thermal-flags = <0x7000>;
/linux-6.12.1/arch/arm64/boot/dts/realtek/
Drtd129x.dtsi8 /memreserve/ 0x0000000000000000 0x000000000001f000;
9 /memreserve/ 0x000000000001f000 0x00000000000e1000;
10 /memreserve/ 0x0000000001b00000 0x00000000004be000;
26 reg = <0x1f000 0x1000>;
30 reg = <0x1ffe000 0x4000>;
34 reg = <0x10100000 0xf00000>;
47 #clock-cells = <0>;
51 soc@0 {
55 ranges = <0x00000000 0x00000000 0x0001f000>, /* boot ROM */
57 <0x80000000 0x80000000 0x80000000>;
[all …]
Drtd139x.dtsi8 /memreserve/ 0x0000000000000000 0x000000000002f000;
9 /memreserve/ 0x000000000002f000 0x00000000000d1000;
25 reg = <0x2f000 0x1000>;
29 reg = <0x1ffe000 0x4000>;
33 reg = <0x10100000 0xf00000>;
46 #clock-cells = <0>;
50 soc@0 {
54 ranges = <0x00000000 0x00000000 0x0001f000>, /* boot ROM */
55 <0x98000000 0x98000000 0x68000000>;
59 reg = <0x98000000 0x200000>;
[all …]

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