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/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dqru1000.dtsi13 reg = <0x0 0xa0000000 0x0 0x6400000>;
18 reg = <0x0 0xaea00000 0x0 0x6400000>;
23 reg = <0x0 0xb4e00000 0x0 0x3200000>;
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dqcom,msm8996-apcc.yaml13 Qualcomm CPU clock controller for MSM8996 CPUs, clock 0 is for Power cluster
50 reg = <0x6400000 0x90000>;
/linux-6.12.1/tools/testing/selftests/powerpc/pmu/ebb/
Dinstruction_count_test.c58 if (difference < 0) in do_count_loop()
66 return 0; in do_count_loop()
75 do_count_loop(event, 0, 0, false); in determine_overhead()
78 for (i = 0; i < 100; i++) { in determine_overhead()
79 do_count_loop(event, 0, 0, false); in determine_overhead()
116 event_init_named(&event, 0x400FA, "PM_RUN_INST_CMPL"); in instruction_count()
135 FAIL_IF(do_count_loop(&event, 0x100000, overhead, true)); in instruction_count()
138 FAIL_IF(do_count_loop(&event, 0xa00000, overhead, true)); in instruction_count()
141 FAIL_IF(do_count_loop(&event, 0x6400000, overhead, true)); in instruction_count()
144 FAIL_IF(do_count_loop(&event, 0x40000000, overhead, true)); in instruction_count()
[all …]
/linux-6.12.1/arch/arm64/boot/dts/ti/
Dk3-j721e-main.dtsi15 #clock-cells = <0>;
17 clock-frequency = <0>;
21 #clock-cells = <0>;
23 clock-frequency = <0>;
30 reg = <0x0 0x70000000 0x0 0x800000>;
33 ranges = <0x0 0x0 0x70000000 0x800000>;
35 atf-sram@0 {
36 reg = <0x0 0x20000>;
42 reg = <0 0x00100000 0 0x1c000>; /* excludes pinctrl region */
45 ranges = <0x0 0x0 0x00100000 0x1c000>;
[all …]