Searched +full:0 +full:x53f80000 (Results 1 – 10 of 10) sorted by relevance
19 ckih 0128 reg = <0x53f80000 0x4000>;
19 dummy 0109 reg = <0x53f80000 0x4000>;
19 dummy 0175 reg = <0x53f80000 0x4000>;
18 #define MX31_CCM_BASE_ADDR 0x53f8000019 #define MX31_GPT1_BASE_ADDR 0x53f9000022 #define MXC_CCM_CCMR 0x0023 #define MXC_CCM_PDR0 0x0424 #define MXC_CCM_PDR1 0x0825 #define MXC_CCM_MPCTL 0x1026 #define MXC_CCM_UPCTL 0x1427 #define MXC_CCM_SRPCTL 0x1828 #define MXC_CCM_CGR0 0x2029 #define MXC_CCM_CGR1 0x24[all …]
17 #define MX35_CCM_BASE_ADDR 0x53f8000018 #define MX35_GPT1_BASE_ADDR 0x53f9000021 #define MXC_CCM_PDR0 0x0422 #define MX35_CCM_PDR2 0x0c23 #define MX35_CCM_PDR3 0x1024 #define MX35_CCM_PDR4 0x1425 #define MX35_CCM_MPCTL 0x1c26 #define MX35_CCM_PPCTL 0x2027 #define MX35_CCM_CGR0 0x2c28 #define MX35_CCM_CGR1 0x30[all …]
35 #size-cells = <0>;37 cpu@0 {40 reg = <0>;48 reg = <0x68000000 0x100000>;60 reg = <0x1fffc000 0x4000>;63 ranges = <0 0x1fffc000 0x4000>;70 reg = <0x43f00000 0x100000>;75 reg = <0x43f80000 0x4000>;79 #size-cells = <0>;85 reg = <0x43f84000 0x4000>;[all …]
39 #size-cells = <0>;41 cpu@0 {44 reg = <0>;52 reg = <0x68000000 0x10000000>;64 reg = <0x30000000 0x1000>;73 reg = <0x43f00000 0x100000>;78 #size-cells = <0>;80 reg = <0x43f80000 0x4000>;89 #size-cells = <0>;91 reg = <0x43f84000 0x4000>;[all …]
48 #size-cells = <0>;49 cpu@0 {52 reg = <0x0>;60 reg = <0x0fffc000 0x4000>;66 #clock-cells = <0>;72 #clock-cells = <0>;78 #clock-cells = <0>;79 clock-frequency = <0>;84 #clock-cells = <0>;89 usbphy0: usbphy-0 {[all …]
47 #size-cells = <0>;49 cpu@0 {52 reg = <0>;60 reg = <0x68000000 0x8000000>;66 #clock-cells = <0>;73 #phy-cells = <0>;78 #phy-cells = <0>;92 reg = <0x43f00000 0x100000>;97 reg = <0x43f00000 0x4000>;102 #size-cells = <0>;[all …]
51 #size-cells = <0>;52 cpu0: cpu@0 {55 reg = <0x0>;84 reg = <0x0fffc000 0x4000>;90 #clock-cells = <0>;96 #clock-cells = <0>;102 #clock-cells = <0>;103 clock-frequency = <0>;108 #clock-cells = <0>;119 usbphy0: usbphy-0 {[all …]