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/linux-6.12.1/arch/mips/boot/dts/brcm/
Dbcm97435svmb.dts11 memory@0 {
13 reg = <0x00000000 0x10000000>,
14 <0x20000000 0x30000000>,
15 <0x90000000 0x40000000>;
135 brcm,scb-sizes = <0 0x40000000 0 0x40000000>;
136 dma-ranges = <0x43000000 0x00000000 0x00000000 0x00000000 0x0 0x10000000
137 0x43000000 0x00000000 0x10000000 0x20000000 0x0 0x30000000
138 0x43000000 0x00000000 0x40000000 0x90000000 0x0 0x40000000>;
Dbcm97425svmb.dts11 memory@0 {
13 reg = <0x00000000 0x10000000>,
14 <0x20000000 0x30000000>,
15 <0x90000000 0x40000000>;
119 flash@0 {
121 reg = <0>;
133 flash0.cfe@0 {
134 reg = <0x0 0x200000>;
138 reg = <0x200000 0x40000>;
142 reg = <0x240000 0x10000>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/ti/
Dk3-am62.dtsi55 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
56 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
57 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
58 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
59 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
60 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
61 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
62 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
63 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
64 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
Dk3-am62p.dtsi53 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
54 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
55 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
56 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
57 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
58 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
59 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
60 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
61 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
62 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
Dk3-am62a.dtsi54 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
55 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
56 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
57 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
58 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
59 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
60 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
61 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
62 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
63 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
Dk3-j722s.dtsi24 #size-cells = <0>;
46 cpu0: cpu@0 {
48 reg = <0x000>;
51 i-cache-size = <0x8000>;
54 d-cache-size = <0x8000>;
58 clocks = <&k3_clks 135 0>;
63 reg = <0x001>;
66 i-cache-size = <0x8000>;
69 d-cache-size = <0x8000>;
73 clocks = <&k3_clks 136 0>;
[all …]
Dk3-am62-wakeup.dtsi14 reg = <0x00 0x43000000 0x00 0x20000>;
17 ranges = <0x0 0x00 0x43000000 0x20000>;
22 reg = <0x14 0x4>;
27 reg = <0x200 0x8>;
32 reg = <0x4008 0x4>;
37 reg = <0x4018 0x4>;
43 reg = <0x00 0x2b300050 0x00 0x4>,
44 <0x00 0x2b300054 0x00 0x4>,
45 <0x00 0x2b300058 0x00 0x4>;
57 clocks = <&k3_clks 114 0>;
[all …]
Dk3-am62p-j722s-common-wakeup.dtsi11 reg = <0x00 0x43000000 0x00 0x20000>;
14 ranges = <0x00 0x00 0x43000000 0x20000>;
19 reg = <0x14 0x4>;
25 reg = <0x200 0x8>;
30 reg = <0x4008 0x4>;
35 reg = <0x4018 0x4>;
41 reg = <0x00 0x2b300000 0x00 0x100>;
44 clocks = <&k3_clks 114 0>;
51 reg = <0x00 0x2b200000 0x00 0x100>;
54 #size-cells = <0>;
[all …]
Dk3-am64.dtsi54 ranges = <0x00 0x000f4000 0x00 0x000f4000 0x00 0x000002d0>, /* PINCTRL */
55 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
56 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
57 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
58 <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */
59 <0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */
60 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
61 <0x00 0x0d000000 0x00 0x0d000000 0x00 0x00800000>, /* PCIE_CORE */
62 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x00000100>, /* Main RTI0 */
63 <0x00 0x0e010000 0x00 0x0e010000 0x00 0x00000100>, /* Main RTI1 */
[all …]
Dk3-am62a-wakeup.dtsi13 ranges = <0x00 0x00 0x43000000 0x20000>;
17 reg = <0x14 0x4>;
22 reg = <0x200 0x8>;
27 reg = <0x4008 0x4>;
32 reg = <0x4018 0x4>;
38 reg = <0x00 0x2b300000 0x00 0x100>;
41 clocks = <&k3_clks 114 0>;
48 reg = <0x00 0x2b200000 0x00 0x100>;
51 #size-cells = <0>;
60 reg = <0x00 0x2b1f0000 0x00 0x100>;
[all …]
Dk3-am65-wakeup.dtsi19 reg = <0x44083000 0x1000>;
41 ranges = <0x0 0x43000000 0x20000>;
45 reg = <0x14 0x4>;
51 reg = <0x4301c000 0x118>;
54 pinctrl-single,function-mask = <0xffffffff>;
59 reg = <0x42300000 0x100>;
68 reg = <0x42120000 0x100>;
71 #size-cells = <0>;
80 reg = <0x42200000 0x200>;
87 ti,interrupt-ranges = <0 712 16>;
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/pci/
Dcdns,cdns-pcie-host.yaml44 bus-range = <0x0 0xff>;
45 linux,pci-domain = <0>;
46 vendor-id = <0x17cd>;
47 device-id = <0x0200>;
49 reg = <0x0 0xfb000000 0x0 0x01000000>,
50 <0x0 0x41000000 0x0 0x00001000>;
53 ranges = <0x02000000 0x0 0x42000000 0x0 0x42000000 0x0 0x1000000>,
54 <0x01000000 0x0 0x43000000 0x0 0x43000000 0x0 0x0010000>;
55 dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
57 #interrupt-cells = <0x1>;
[all …]
Dxilinx-versal-cpm.yaml55 const: 0
87 interrupts = <0 72 4>;
89 interrupt-map-mask = <0 0 0 7>;
90 interrupt-map = <0 0 0 1 &pcie_intc_0 0>,
91 <0 0 0 2 &pcie_intc_0 1>,
92 <0 0 0 3 &pcie_intc_0 2>,
93 <0 0 0 4 &pcie_intc_0 3>;
94 bus-range = <0x00 0xff>;
95 ranges = <0x02000000 0x0 0xe0010000 0x0 0xe0010000 0x0 0x10000000>,
96 <0x43000000 0x80 0x00000000 0x80 0x00000000 0x0 0x80000000>;
[all …]
Dversatile.yaml38 - const: 0x1800
39 - const: 0
40 - const: 0
58 reg = <0x10001000 0x1000>,
59 <0x41000000 0x10000>,
60 <0x42000000 0x100000>;
61 bus-range = <0 0xff>;
67 <0x01000000 0 0x00000000 0x43000000 0 0x00010000>, /* downstream I/O */
68 <0x02000000 0 0x50000000 0x50000000 0 0x10000000>, /* non-prefetchable memory */
69 <0x42000000 0 0x60000000 0x60000000 0 0x10000000>; /* prefetchable memory */
[all …]
Dmicrochip,pcie-host.yaml41 0-3
45 pattern: '^fic[0-3]$'
64 reg = <0x0 0x70000000 0x0 0x08000000>,
65 <0x0 0x43000000 0x0 0x00010000>;
72 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
73 interrupt-map = <0 0 0 1 &pcie_intc0 0>,
74 <0 0 0 2 &pcie_intc0 1>,
75 <0 0 0 3 &pcie_intc0 2>,
76 <0 0 0 4 &pcie_intc0 3>;
80 bus-range = <0x00 0x7f>;
[all …]
Dxlnx,xdma-host.yaml50 - const: 0
51 - const: 0
52 - const: 0
68 const: 0
124 reg = <0x0 0xa0000000 0x0 0x10000000>;
125 ranges = <0x2000000 0x0 0xb0000000 0x0 0xb0000000 0x0 0x1000000>,
126 <0x43000000 0x5 0x0 0x5 0x0 0x0 0x1000000>;
135 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
136 interrupt-map = <0 0 0 1 &pcie_intc_0 0>,
137 <0 0 0 2 &pcie_intc_0 1>,
[all …]
Dxlnx,nwl-pcie.yaml50 - const: 0
51 - const: 0
52 - const: 0
87 const: 0
125 reg = <0x0 0xfd0e0000 0x0 0x1000>,
126 <0x0 0xfd480000 0x0 0x1000>,
127 <0x80 0x00000000 0x0 0x10000000>;
129 ranges = <0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000>,
130 <0x43000000 0x00000006 0x0 0x00000006 0x0 0x00000002 0x0>;
141 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/timer/
Dfaraday,fttmr010.txt32 reg = <0x43000000 0x1000>;
/linux-6.12.1/arch/riscv/boot/dts/microchip/
Dmpfs-polarberry-fabric.dtsi7 #clock-cells = <0>;
13 #clock-cells = <0>;
19 #address-cells = <0x3>;
20 #interrupt-cells = <0x1>;
21 #size-cells = <0x2>;
23 reg = <0x20 0x0 0x0 0x8000000>, <0x0 0x43000000 0x0 0x10000>;
25 bus-range = <0x0 0x7f>;
28 interrupt-map = <0 0 0 1 &pcie_intc 0>,
29 <0 0 0 2 &pcie_intc 1>,
30 <0 0 0 3 &pcie_intc 2>,
[all …]
Dmpfs-m100pfs-fabric.dtsi7 #clock-cells = <0>;
13 #clock-cells = <0>;
19 #address-cells = <0x3>;
20 #interrupt-cells = <0x1>;
21 #size-cells = <0x2>;
23 reg = <0x20 0x0 0x0 0x8000000>, <0x0 0x43000000 0x0 0x10000>;
25 bus-range = <0x0 0x7f>;
28 interrupt-map = <0 0 0 1 &pcie_intc 0>,
29 <0 0 0 2 &pcie_intc 1>,
30 <0 0 0 3 &pcie_intc 2>,
[all …]
Dmpfs-icicle-kit-fabric.dtsi10 reg = <0x0 0x40000000 0x0 0xF0>;
11 microchip,sync-update-mask = /bits/ 32 <0>;
19 reg = <0x0 0x40000200 0x0 0x100>;
21 #size-cells = <0>;
31 #address-cells = <0x3>;
32 #interrupt-cells = <0x1>;
33 #size-cells = <0x2>;
35 reg = <0x30 0x0 0x0 0x8000000>, <0x0 0x43000000 0x0 0x10000>;
37 bus-range = <0x0 0x7f>;
40 interrupt-map = <0 0 0 1 &pcie_intc 0>,
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/net/bluetooth/
Dbrcm,bcm4377-bluetooth.yaml70 reg = <0xa0000000 0x1000000>;
72 ranges = <0x43000000 0x6 0xa0000000 0xa0000000 0x0 0x20000000>;
74 bluetooth@0,1 {
76 reg = <0x100 0x0 0x0 0x0 0x0>;
/linux-6.12.1/arch/arm/boot/dts/arm/
Dversatile-pb.dts11 clear-mask = <0xffffffff>;
16 valid-mask = <0x7fe003ff>;
21 reg = <0x101e6000 0x1000>;
33 reg = <0x101e7000 0x1000>;
46 reg = <0x10001000 0x1000
47 0x41000000 0x10000
48 0x42000000 0x100000>;
49 bus-range = <0 0xff>;
54 ranges = <0x01000000 0 0x00000000 0x43000000 0 0x00010000 /* downstream I/O */
55 0x02000000 0 0x50000000 0x50000000 0 0x10000000 /* non-prefetchable memory */
[all …]
/linux-6.12.1/arch/arm64/boot/dts/cavium/
Dthunder2-99xx.dtsi21 #address-cells = <0x2>;
22 #size-cells = <0x0>;
24 cpu@0 {
27 reg = <0x0 0x0>;
34 reg = <0x0 0x1>;
41 reg = <0x0 0x2>;
48 reg = <0x0 0x3>;
66 reg = <0x04 0x00080000 0x0 0x20000>, /* GICD */
67 <0x04 0x01000000 0x0 0x1000000>; /* GICR */
73 reg = <0x04 0x00100000 0x0 0x20000>; /* GIC ITS */
[all …]
/linux-6.12.1/arch/arm64/boot/dts/apm/
Dapm-storm.dtsi16 #size-cells = <0>;
18 cpu@0 {
21 reg = <0x0 0x000>;
23 cpu-release-addr = <0x1 0x0000fff8>;
29 reg = <0x0 0x001>;
31 cpu-release-addr = <0x1 0x0000fff8>;
37 reg = <0x0 0x100>;
39 cpu-release-addr = <0x1 0x0000fff8>;
45 reg = <0x0 0x101>;
47 cpu-release-addr = <0x1 0x0000fff8>;
[all …]

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