/linux-6.12.1/Documentation/devicetree/bindings/mips/loongson/ |
D | ls2k-reset.yaml | 35 reg = <0 0x1fe07000 0 0x422>;
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/linux-6.12.1/drivers/staging/rtl8723bs/hal/ |
D | rtl8723b_cmd.c | 27 if (0 == valid) { in _is_fw_read_cmd_down() 39 *| 31 - 8 |7-5 | 4 - 0 | 41 *| 31-0 | 49 u32 msgbox_ex_addr = 0; in FillH2CCmd8723B() 51 u32 h2c_cmd = 0; in FillH2CCmd8723B() 52 u32 h2c_cmd_ex = 0; in FillH2CCmd8723B() 97 } while (0); in FillH2CCmd8723B() 119 *(fctrl) = 0; in ConstructBeacon() 125 SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); in ConstructBeacon() 148 if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) { in ConstructBeacon() [all …]
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/linux-6.12.1/arch/mips/boot/dts/loongson/ |
D | loongson64-2k1000.dtsi | 15 #size-cells = <0>; 17 cpu0: cpu@0 { 20 reg = <0x0>; 27 #clock-cells = <0>; 33 #address-cells = <0>; 43 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* ioports */ 44 0 0x40000000 0 0x40000000 0 0x40000000 45 0xfe 0x00000000 0xfe 0x00000000 0 0x40000000>; 51 ranges = <1 0x0 0x0 0x18000000 0x4000>; 56 reg = <0 0x1fe07000 0 0x422>; [all …]
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/linux-6.12.1/drivers/media/dvb-frontends/ |
D | au8522_priv.h | 27 #define AU8522_ANALOG_MODE 0 88 #define AU8522_INPUT_CONTROL_REG081H 0x081 89 #define AU8522_PGA_CONTROL_REG082H 0x082 90 #define AU8522_CLAMPING_CONTROL_REG083H 0x083 92 #define AU8522_MODULE_CLOCK_CONTROL_REG0A3H 0x0A3 93 #define AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H 0x0A4 94 #define AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H 0x0A5 95 #define AU8522_AGC_CONTROL_RANGE_REG0A6H 0x0A6 96 #define AU8522_SYSTEM_GAIN_CONTROL_REG0A7H 0x0A7 97 #define AU8522_TUNER_AGC_RF_STOP_REG0A8H 0x0A8 [all …]
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/linux-6.12.1/drivers/media/pci/cx18/ |
D | cx18-av-core.h | 32 CX18_AV_SVIDEO_LUMA1 = 0x10, 33 CX18_AV_SVIDEO_LUMA2 = 0x20, 34 CX18_AV_SVIDEO_LUMA3 = 0x30, 35 CX18_AV_SVIDEO_LUMA4 = 0x40, 36 CX18_AV_SVIDEO_LUMA5 = 0x50, 37 CX18_AV_SVIDEO_LUMA6 = 0x60, 38 CX18_AV_SVIDEO_LUMA7 = 0x70, 39 CX18_AV_SVIDEO_LUMA8 = 0x80, 40 CX18_AV_SVIDEO_CHROMA4 = 0x400, 41 CX18_AV_SVIDEO_CHROMA5 = 0x500, [all …]
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D | cx18-av-core.c | 17 u32 reg = 0xc40000 + (addr & ~3); in cx18_av_write() 18 u32 mask = 0xff; in cx18_av_write() 24 return 0; in cx18_av_write() 29 u32 reg = 0xc40000 + (addr & ~3); in cx18_av_write_expect() 33 x = (x & ~((u32)0xff << shift)) | ((u32)value << shift); in cx18_av_write_expect() 36 return 0; in cx18_av_write_expect() 41 cx18_write_reg(cx, value, 0xc40000 + addr); in cx18_av_write4() 42 return 0; in cx18_av_write4() 48 cx18_write_reg_expect(cx, value, 0xc40000 + addr, eval, mask); in cx18_av_write4_expect() 49 return 0; in cx18_av_write4_expect() [all …]
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/linux-6.12.1/include/linux/mfd/mt6331/ |
D | registers.h | 10 #define MT6331_STRUP_CON0 0x0 11 #define MT6331_STRUP_CON2 0x2 12 #define MT6331_STRUP_CON3 0x4 13 #define MT6331_STRUP_CON4 0x6 14 #define MT6331_STRUP_CON5 0x8 15 #define MT6331_STRUP_CON6 0xA 16 #define MT6331_STRUP_CON7 0xC 17 #define MT6331_STRUP_CON8 0xE 18 #define MT6331_STRUP_CON9 0x10 19 #define MT6331_STRUP_CON10 0x12 [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/oss/ |
D | oss_2_0_d.h | 27 #define mmIH_VMID_0_LUT 0xf50 28 #define mmIH_VMID_1_LUT 0xf51 29 #define mmIH_VMID_2_LUT 0xf52 30 #define mmIH_VMID_3_LUT 0xf53 31 #define mmIH_VMID_4_LUT 0xf54 32 #define mmIH_VMID_5_LUT 0xf55 33 #define mmIH_VMID_6_LUT 0xf56 34 #define mmIH_VMID_7_LUT 0xf57 35 #define mmIH_VMID_8_LUT 0xf58 36 #define mmIH_VMID_9_LUT 0xf59 [all …]
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/linux-6.12.1/drivers/net/wireless/broadcom/b43legacy/ |
D | b43legacy.h | 30 #define B43legacy_MMIO_DMA0_REASON 0x20 31 #define B43legacy_MMIO_DMA0_IRQ_MASK 0x24 32 #define B43legacy_MMIO_DMA1_REASON 0x28 33 #define B43legacy_MMIO_DMA1_IRQ_MASK 0x2C 34 #define B43legacy_MMIO_DMA2_REASON 0x30 35 #define B43legacy_MMIO_DMA2_IRQ_MASK 0x34 36 #define B43legacy_MMIO_DMA3_REASON 0x38 37 #define B43legacy_MMIO_DMA3_IRQ_MASK 0x3C 38 #define B43legacy_MMIO_DMA4_REASON 0x40 39 #define B43legacy_MMIO_DMA4_IRQ_MASK 0x44 [all …]
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/linux-6.12.1/drivers/gpu/drm/tegra/ |
D | dc.h | 176 #define DC_CMD_GENERAL_INCR_SYNCPT 0x000 177 #define DC_CMD_GENERAL_INCR_SYNCPT_CNTRL 0x001 179 #define SYNCPT_CNTRL_SOFT_RESET (1 << 0) 180 #define DC_CMD_GENERAL_INCR_SYNCPT_ERROR 0x002 181 #define DC_CMD_WIN_A_INCR_SYNCPT 0x008 182 #define DC_CMD_WIN_A_INCR_SYNCPT_CNTRL 0x009 183 #define DC_CMD_WIN_A_INCR_SYNCPT_ERROR 0x00a 184 #define DC_CMD_WIN_B_INCR_SYNCPT 0x010 185 #define DC_CMD_WIN_B_INCR_SYNCPT_CNTRL 0x011 186 #define DC_CMD_WIN_B_INCR_SYNCPT_ERROR 0x012 [all …]
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/linux-6.12.1/drivers/perf/ |
D | qcom_l2_pmu.c | 31 #define L2PMCR_NUM_EV_MASK 0x1F 33 #define L2PMCR 0x400 34 #define L2PMCNTENCLR 0x403 35 #define L2PMCNTENSET 0x404 36 #define L2PMINTENCLR 0x405 37 #define L2PMINTENSET 0x406 38 #define L2PMOVSCLR 0x407 39 #define L2PMOVSSET 0x408 40 #define L2PMCCNTCR 0x409 41 #define L2PMCCNTR 0x40A [all …]
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/linux-6.12.1/include/linux/mfd/mt6357/ |
D | registers.h | 10 #define MT6357_TOP0_ID 0x0 11 #define MT6357_TOP0_REV0 0x2 12 #define MT6357_TOP0_DSN_DBI 0x4 13 #define MT6357_TOP0_DSN_DXI 0x6 14 #define MT6357_HWCID 0x8 15 #define MT6357_SWCID 0xa 16 #define MT6357_PONSTS 0xc 17 #define MT6357_POFFSTS 0xe 18 #define MT6357_PSTSCTL 0x10 19 #define MT6357_PG_DEB_STS0 0x12 [all …]
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/linux-6.12.1/drivers/net/wireless/broadcom/b43/ |
D | b43.h | 25 # define B43_DEBUG 0 29 #define B43_MMIO_DMA0_REASON 0x20 30 #define B43_MMIO_DMA0_IRQ_MASK 0x24 31 #define B43_MMIO_DMA1_REASON 0x28 32 #define B43_MMIO_DMA1_IRQ_MASK 0x2C 33 #define B43_MMIO_DMA2_REASON 0x30 34 #define B43_MMIO_DMA2_IRQ_MASK 0x34 35 #define B43_MMIO_DMA3_REASON 0x38 36 #define B43_MMIO_DMA3_IRQ_MASK 0x3C 37 #define B43_MMIO_DMA4_REASON 0x40 [all …]
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/linux-6.12.1/drivers/mfd/ |
D | cs47l92-tables.c | 21 { 0x3A2, 0x2C29 }, 22 { 0x3A3, 0x0E00 }, 23 { 0x281, 0x0000 }, 24 { 0x282, 0x0000 }, 25 { 0x4EA, 0x0100 }, 26 { 0x22B, 0x0000 }, 27 { 0x4A0, 0x0080 }, 28 { 0x4A1, 0x0000 }, 29 { 0x4A2, 0x0000 }, 30 { 0x180B, 0x033F }, [all …]
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/linux-6.12.1/drivers/net/wireless/broadcom/brcm80211/brcmsmac/ |
D | d11.h | 27 #define RX_FIFO 0 /* data and ctl frames */ 31 #define TX_AC_BK_FIFO 0 /* Background TX FIFO */ 41 #define M_AC_TXLMT_BASE_ADDR (0x180 * 2) 109 u32 PAD[3]; /* 0x0 - 0x8 */ 110 u32 biststatus; /* 0xC */ 111 u32 biststatus2; /* 0x10 */ 112 u32 PAD; /* 0x14 */ 113 u32 gptimer; /* 0x18 */ 114 u32 usectimer; /* 0x1c *//* for corerev >= 26 */ 116 /* Interrupt Control *//* 0x20 */ [all …]
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/linux-6.12.1/tools/perf/pmu-events/arch/x86/westmereep-dp/ |
D | cache.json | 4 "Counter": "0,1", 5 "EventCode": "0x63", 8 "UMask": "0x2" 12 "Counter": "0,1", 13 "EventCode": "0x63", 16 "UMask": "0x1" 20 "Counter": "0,1", 21 "EventCode": "0x51", 24 "UMask": "0x4" 28 "Counter": "0,1", [all …]
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/linux-6.12.1/tools/perf/pmu-events/arch/x86/nehalemex/ |
D | cache.json | 4 "Counter": "0,1", 5 "EventCode": "0x63", 8 "UMask": "0x2" 12 "Counter": "0,1", 13 "EventCode": "0x63", 16 "UMask": "0x1" 20 "Counter": "0,1", 21 "EventCode": "0x51", 24 "UMask": "0x4" 28 "Counter": "0,1", [all …]
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/linux-6.12.1/include/linux/mfd/madera/ |
D | registers.h | 14 #define MADERA_SOFTWARE_RESET 0x00 15 #define MADERA_HARDWARE_REVISION 0x01 16 #define MADERA_CTRL_IF_CFG_1 0x08 17 #define MADERA_CTRL_IF_CFG_2 0x09 18 #define MADERA_CTRL_IF_CFG_3 0x0A 19 #define MADERA_WRITE_SEQUENCER_CTRL_0 0x16 20 #define MADERA_WRITE_SEQUENCER_CTRL_1 0x17 21 #define MADERA_WRITE_SEQUENCER_CTRL_2 0x18 22 #define MADERA_TONE_GENERATOR_1 0x20 23 #define MADERA_TONE_GENERATOR_2 0x21 [all …]
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/linux-6.12.1/tools/perf/pmu-events/arch/x86/westmereex/ |
D | cache.json | 4 "Counter": "0,1", 5 "EventCode": "0x63", 8 "UMask": "0x2" 12 "Counter": "0,1", 13 "EventCode": "0x63", 16 "UMask": "0x1" 20 "Counter": "0,1", 21 "EventCode": "0x51", 24 "UMask": "0x4" 28 "Counter": "0,1", [all …]
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/linux-6.12.1/tools/perf/pmu-events/arch/x86/nehalemep/ |
D | cache.json | 4 "Counter": "0,1", 5 "EventCode": "0x63", 8 "UMask": "0x2" 12 "Counter": "0,1", 13 "EventCode": "0x63", 16 "UMask": "0x1" 20 "Counter": "0,1", 21 "EventCode": "0x51", 24 "UMask": "0x4" 28 "Counter": "0,1", [all …]
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/linux-6.12.1/sound/soc/codecs/ |
D | wm8995.h | 18 #define WM8995_SOFTWARE_RESET 0x00 19 #define WM8995_POWER_MANAGEMENT_1 0x01 20 #define WM8995_POWER_MANAGEMENT_2 0x02 21 #define WM8995_POWER_MANAGEMENT_3 0x03 22 #define WM8995_POWER_MANAGEMENT_4 0x04 23 #define WM8995_POWER_MANAGEMENT_5 0x05 24 #define WM8995_LEFT_LINE_INPUT_1_VOLUME 0x10 25 #define WM8995_RIGHT_LINE_INPUT_1_VOLUME 0x11 26 #define WM8995_LEFT_LINE_INPUT_CONTROL 0x12 27 #define WM8995_DAC1_LEFT_VOLUME 0x18 [all …]
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/linux-6.12.1/tools/perf/pmu-events/arch/x86/westmereep-sp/ |
D | cache.json | 4 "Counter": "0,1", 5 "EventCode": "0x63", 8 "UMask": "0x2" 12 "Counter": "0,1", 13 "EventCode": "0x63", 16 "UMask": "0x1" 20 "Counter": "0,1", 21 "EventCode": "0x51", 24 "UMask": "0x4" 28 "Counter": "0,1", [all …]
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/linux-6.12.1/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/ |
D | hw.c | 42 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0x64); in _rtl92ee_stop_tx_beacon() 44 tmp &= ~(BIT(0)); in _rtl92ee_stop_tx_beacon() 55 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff); in _rtl92ee_resume_tx_beacon() 57 tmp |= BIT(0); in _rtl92ee_resume_tx_beacon() 63 _rtl92ee_set_bcn_ctrl_reg(hw, 0, BIT(1)); in _rtl92ee_enable_bcn_sub_func() 68 _rtl92ee_set_bcn_ctrl_reg(hw, BIT(1), 0); in _rtl92ee_disable_bcn_sub_func() 77 u32 count = 0, isr_regaddr, content; in _rtl92ee_set_fw_clock_on() 120 rtl_write_word(rtlpriv, isr_regaddr, 0x0100); in _rtl92ee_set_fw_clock_on() 163 for (queue = 0; queue < RTL_PCI_MAX_TX_QUEUE_COUNT; queue++) { in _rtl92ee_set_fw_clock_off() 183 rtl_write_word(rtlpriv, REG_HISR, 0x0100); in _rtl92ee_set_fw_clock_off() [all …]
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/linux-6.12.1/drivers/net/wireless/realtek/rtl8xxxu/ |
D | 8192f.c | 18 {0x420, 0x00}, {0x422, 0x78}, {0x428, 0x0a}, {0x429, 0x10}, 19 {0x430, 0x00}, {0x431, 0x00}, {0x432, 0x00}, {0x433, 0x01}, 20 {0x434, 0x04}, {0x435, 0x05}, {0x436, 0x07}, {0x437, 0x08}, 21 {0x43c, 0x04}, {0x43d, 0x05}, {0x43e, 0x07}, {0x43f, 0x08}, 22 {0x440, 0x5d}, {0x441, 0x01}, {0x442, 0x00}, {0x444, 0x10}, 23 {0x445, 0xf0}, {0x446, 0x0e}, {0x447, 0x1f}, {0x448, 0x00}, 24 {0x449, 0x00}, {0x44a, 0x00}, {0x44b, 0x00}, {0x44c, 0x10}, 25 {0x44d, 0xf0}, {0x44e, 0x0e}, {0x44f, 0x00}, {0x450, 0x00}, 26 {0x451, 0x00}, {0x452, 0x00}, {0x453, 0x00}, {0x480, 0x20}, 27 {0x49c, 0x30}, {0x49d, 0xf0}, {0x49e, 0x03}, {0x49f, 0x3e}, [all …]
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/linux-6.12.1/drivers/media/usb/cx231xx/ |
D | cx231xx-reg.h | 17 #define SAV_ACTIVE_VIDEO_FIELD1 0x80 18 #define EAV_ACTIVE_VIDEO_FIELD1 0x90 20 #define SAV_ACTIVE_VIDEO_FIELD2 0xc0 21 #define EAV_ACTIVE_VIDEO_FIELD2 0xd0 23 #define SAV_VBLANK_FIELD1 0xa0 24 #define EAV_VBLANK_FIELD1 0xb0 26 #define SAV_VBLANK_FIELD2 0xe0 27 #define EAV_VBLANK_FIELD2 0xf0 29 #define SAV_VBI_FIELD1 0x20 30 #define EAV_VBI_FIELD1 0x30 [all …]
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