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/linux-6.12.1/Documentation/devicetree/bindings/net/
Dbrcm,unimac-mdio.yaml25 - brcm,asp-v2.0-mdio
80 reg = <0x403c0 0x8>, <0x40300 0x18>;
83 #size-cells = <0>;
85 ethernet-phy@0 {
87 reg = <0>;
/linux-6.12.1/drivers/accel/habanalabs/include/goya/asic_reg/
Dmme1_rtr_regs.h22 #define mmMME1_RTR_HBW_RD_RQ_E_ARB 0x40100
24 #define mmMME1_RTR_HBW_RD_RQ_W_ARB 0x40104
26 #define mmMME1_RTR_HBW_RD_RQ_N_ARB 0x40108
28 #define mmMME1_RTR_HBW_RD_RQ_S_ARB 0x4010C
30 #define mmMME1_RTR_HBW_RD_RQ_L_ARB 0x40110
32 #define mmMME1_RTR_HBW_E_ARB_MAX 0x40120
34 #define mmMME1_RTR_HBW_W_ARB_MAX 0x40124
36 #define mmMME1_RTR_HBW_N_ARB_MAX 0x40128
38 #define mmMME1_RTR_HBW_S_ARB_MAX 0x4012C
40 #define mmMME1_RTR_HBW_L_ARB_MAX 0x40130
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/linux-6.12.1/drivers/media/test-drivers/vivid/
Dvivid-core.c56 static int vid_cap_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
60 static int vid_out_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
64 static int vbi_cap_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
68 static int vbi_out_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
72 static int sdr_cap_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
76 static int radio_rx_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
80 static int radio_tx_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
84 static int meta_cap_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
88 static int meta_out_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
92 static int touch_cap_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
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/linux-6.12.1/drivers/net/ethernet/chelsio/cxgb4/
Dt4_hw.c54 * at the time it indicated completion is stored there. Returns 0 if the
66 return 0; in t4_wait_op_done_val()
68 if (--attempts == 0) in t4_wait_op_done_val()
167 /* Reset ENABLE to 0 so reads of PCIE_CFG_SPACE_DATA won't cause a in t4_hw_pci_read_cfg4()
169 * ENABLE is 0 so a simple register write is easier than a in t4_hw_pci_read_cfg4()
172 t4_write_reg(adap, PCIE_CFG_SPACE_REQ_A, 0); in t4_hw_pci_read_cfg4()
247 log->cursor = 0; in t4_record_mbox()
249 for (i = 0; i < size / 8; i++) in t4_record_mbox()
252 entry->cmd[i++] = 0; in t4_record_mbox()
277 * The return value is 0 on success or a negative errno on failure. A
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