Searched +full:0 +full:x40000 (Results 1 – 25 of 849) sorted by relevance
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/linux-6.12.1/drivers/crypto/cavium/nitrox/ |
D | nitrox_csr.h | 21 #define EMU_BIST_STATUSX(_i) (0x1402700 + ((_i) * 0x40000)) 22 #define UCD_BIST_STATUS 0x12C0070 23 #define NPS_CORE_BIST_REG 0x10000E8 24 #define NPS_CORE_NPC_BIST_REG 0x1000128 25 #define NPS_PKT_SLC_BIST_REG 0x1040088 26 #define NPS_PKT_IN_BIST_REG 0x1040100 27 #define POM_BIST_REG 0x11C0100 28 #define BMI_BIST_REG 0x1140080 29 #define EFL_CORE_BIST_REGX(_i) (0x1240100 + ((_i) * 0x400)) 30 #define EFL_TOP_BIST_STAT 0x1241090 [all …]
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/linux-6.12.1/arch/arm/boot/dts/microchip/ |
D | at91sam9x5cm.dtsi | 11 reg = <0x20000000 0x8000000>; 27 timer@0 { 29 reg = <0>; 40 pinctrl_1wire_cm: 1wire_cm-0 { 52 pinctrl-0 = <&pinctrl_ebi_addr_nand 59 pinctrl-0 = <&pinctrl_nand_oe_we 65 reg = <0x3 0x0 0x800000>; 80 at91bootstrap@0 { 82 reg = <0x0 0x40000>; 87 reg = <0x40000 0xc0000>; [all …]
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D | aks-cdu.dts | 33 rs485-rts-delay = <0 0>; 39 rs485-rts-delay = <0 0>; 45 rs485-rts-delay = <0 0>; 68 bootstrap@0 { 70 reg = <0x0 0x40000>; 75 reg = <0x40000 0x80000>; 80 reg = <0xc0000 0x40000>; 85 reg = <0x100000 0x400000>; 90 reg = <0x500000 0x7b00000>;
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D | at91-sam9x60ek.dts | 40 pinctrl-0 = <&pinctrl_key_gpio_default>; 53 pinctrl-0 = <&pinctrl_gpio_leds>; 110 pinctrl-0 = <&pinctrl_adc_default &pinctrl_adtrg_default>; 116 pinctrl-0 = <&pinctrl_can0_rx_tx>; 122 pinctrl-0 = <&pinctrl_can1_rx_tx>; 128 pinctrl-0 = <&pinctrl_classd_default>; 136 pinctrl-0 = <&pinctrl_dbgu>; 142 pinctrl-0 = <&pinctrl_ebi_addr_nand &pinctrl_ebi_data_0_7>; 147 pinctrl-0 = <&pinctrl_nand_oe_we &pinctrl_nand_cs &pinctrl_nand_rb>; 151 reg = <0x3 0x0 0x800000>; [all …]
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D | at91-sama5d4_xplained.dts | 21 reg = <0x20000000 0x20000000>; 51 pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>; 62 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>; 66 slot@0 { 67 reg = <0>; 69 cd-gpios = <&pioE 3 0>; 86 cs-gpios = <&pioB 21 0>; 91 timer0: timer@0 { 93 reg = <0>; 104 pinctrl-0 = < [all …]
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D | at91-sama5d3_eds.dts | 26 pinctrl-0 = <&pinctrl_key_gpio>; 31 linux,code = <0x104>; 37 reg = <0x20000000 0x10000000>; 81 pinctrl-0 = <&pinctrl_vcc_mmc0_reg_gpio>; 95 pinctrl-0 = <&pinctrl_ebi_nand_addr>; 103 reg = <0x3 0x0 0x2>; 104 atmel,rb = <0>; 117 at91bootstrap@0 { 119 reg = <0x0 0x40000>; 124 reg = <0x40000 0xc0000>; [all …]
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D | at91-nattis-2-natte-2.dts | 45 pwms = <&hlcdc_pwm 0 100000 0>; 47 brightness-levels = < 0 1 2 3 4 5 6 7 8 9 63 pinctrl-0 = <&pinctrl_blon>; 101 pinctrl-0 = <&pinctrl_lvds_prlud0 &pinctrl_lvds_hipow0>; 105 #size-cells = <0>; 107 port@0 { 108 reg = <0>; 160 AT91_PINCTRL_OUTPUT_VAL(0))>; 166 AT91_PINCTRL_OUTPUT_VAL(0))>; 172 AT91_PINCTRL_OUTPUT_VAL(0))>; [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/ |
D | open-pic.txt | 26 address. The type shall be <u32> and the value shall be 0. As such, 45 0 = low-to-high edge triggered 63 #address-cells = <0>; 68 // Offset address of 0x40000 and size of 0x40000. 69 reg = <0x40000 0x40000>;
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/linux-6.12.1/arch/arm64/boot/dts/mediatek/ |
D | mt7986a-bananapi-bpi-r3-nor.dtso | 16 #size-cells = <0>; 18 flash@0 { 20 reg = <0>; 28 partition@0 { 30 reg = <0x0 0x40000>; 36 reg = <0x40000 0x40000>; 41 reg = <0x80000 0x80000>; 46 reg = <0x100000 0x80000>; 52 reg = <0x180000 0xa80000>; 57 reg = <0xc00000 0x1400000>;
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/linux-6.12.1/arch/powerpc/boot/dts/fsl/ |
D | pq3-mpic.dtsi | 2 * PQ3 MPIC device tree stub [ controller @ offset 0x40000 ] 37 #address-cells = <0>; 39 reg = <0x40000 0x40000>; 49 reg = <0x41100 0x100 0x41300 4>; 50 interrupts = <0 0 3 0 51 1 0 3 0 52 2 0 3 0 53 3 0 3 0>; 58 reg = <0x41400 0x200>; 60 0xb0 2 0 0 [all …]
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D | qoriq-mpic.dtsi | 2 * QorIQ MPIC device tree stub [ controller @ offset 0x40000 ] 37 #address-cells = <0>; 39 reg = <0x40000 0x40000>; 42 clock-frequency = <0x0>; 47 reg = <0x41100 0x100 0x41300 4>; 48 interrupts = <0 0 3 0 49 1 0 3 0 50 2 0 3 0 51 3 0 3 0>; 56 reg = <0x41600 0x200 0x44140 4>; [all …]
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D | qoriq-mpic4.3.dtsi | 2 * QorIQ MPIC device tree stub [ controller @ offset 0x40000 ] 37 #address-cells = <0>; 39 reg = <0x40000 0x40000>; 42 clock-frequency = <0x0>; 47 reg = <0x41100 0x100 0x41300 4>; 48 interrupts = <0 0 3 0 49 1 0 3 0 50 2 0 3 0 51 3 0 3 0>; 56 reg = <0x41600 0x200 0x44148 4>; [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/remoteproc/ |
D | st,stm32-rproc.yaml | 168 reg = <0x10000000 0x40000>, 169 <0x30000000 0x40000>, 170 <0x38000000 0x10000>; 174 st,syscfg-holdboot = <&rcc 0x10C 0x1>; 175 st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>; 176 st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>; 182 reg = <0x10000000 0x40000>, 183 <0x30000000 0x40000>, 184 <0x38000000 0x10000>; 188 st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>; [all …]
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/linux-6.12.1/arch/powerpc/boot/dts/ |
D | xpedite5301.dts | 16 boot-bank = <0x0>; /* 0: Primary flash, 1: Secondary flash */ 29 #size-cells = <0>; 31 PowerPC,8572@0 { 33 reg = <0x0>; 36 d-cache-size = <0x8000>; // L1, 32K 37 i-cache-size = <0x8000>; // L1, 32K 38 timebase-frequency = <0>; 39 bus-frequency = <0>; 40 clock-frequency = <0>; 46 reg = <0x1>; [all …]
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D | xpedite5370.dts | 27 #size-cells = <0>; 29 PowerPC,8572@0 { 31 reg = <0x0>; 34 d-cache-size = <0x8000>; // L1, 32K 35 i-cache-size = <0x8000>; // L1, 32K 36 timebase-frequency = <0>; 37 bus-frequency = <0>; 38 clock-frequency = <0>; 44 reg = <0x1>; 47 d-cache-size = <0x8000>; // L1, 32K [all …]
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D | xcalibur1501.dts | 28 #size-cells = <0>; 30 PowerPC,8572@0 { 32 reg = <0x0>; 35 d-cache-size = <0x8000>; // L1, 32K 36 i-cache-size = <0x8000>; // L1, 32K 37 timebase-frequency = <0>; 38 bus-frequency = <0>; 39 clock-frequency = <0>; 45 reg = <0x1>; 48 d-cache-size = <0x8000>; // L1, 32K [all …]
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D | socrates.dts | 27 #size-cells = <0>; 29 PowerPC,8544@0 { 31 reg = <0>; 34 d-cache-size = <0x8000>; // L1, 32K 35 i-cache-size = <0x8000>; // L1, 32K 36 timebase-frequency = <0>; 37 bus-frequency = <0>; 38 clock-frequency = <0>; 45 reg = <0x00000000 0x00000000>; // Filled in by U-Boot 53 ranges = <0x00000000 0xe0000000 0x00100000>; [all …]
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D | xpedite5330.dts | 16 boot-bank = <0x0>; /* 0: Primary flash, 1: Secondary flash */ 30 #size-cells = <0>; 32 pmcslot@0 { 33 cell-index = <0>; 44 #size-cells = <0>; 46 xmcslot@0 { 47 cell-index = <0>; 65 #size-cells = <0>; 67 PowerPC,8572@0 { 69 reg = <0x0>; [all …]
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/linux-6.12.1/arch/arm/boot/dts/ti/omap/ |
D | omap3430-sdp.dts | 15 reg = <0x80000000 0x10000000>; /* 256 MB */ 23 reg = <0x48>; 50 ranges = <0 0 0x10000000 0x08000000>, 51 <1 0 0x28000000 0x1000000>, /* CS1: 16MB for NAND */ 52 <2 0 0x20000000 0x1000000>; /* CS2: 16MB for OneNAND */ 54 nor@0,0 { 59 reg = <0 0 0x08000000>; 63 gpmc,cs-on-ns = <0>; 84 partition@0 { 86 reg = <0 0x40000>; [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/net/ |
D | brcm,bcm7445-switch-v4.0.txt | 3 See dsa/brcm,bcm7445-switch-v4.0.yaml for the documentation. 17 ranges = <0 0xf0b00000 0x40804>; 19 ethernet_switch@0 { 20 compatible = "brcm,bcm7445-switch-v4.0"; 21 #size-cells = <0>; 23 reg = <0x0 0x40000 24 0x40000 0x110 25 0x40340 0x30 26 0x40380 0x30 27 0x40400 0x34 [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/sram/ |
D | sram.yaml | 159 reg = <0x5c000000 0x40000>; /* 256 KiB SRAM at address 0x5c000000 */ 163 ranges = <0 0x5c000000 0x40000>; 166 reg = <0x100 0x50>; 170 reg = <0x1000 0x1000>; 175 reg = <0x20000 0x20000>; 190 reg = <0x02020000 0x54000>; 193 ranges = <0 0x02020000 0x54000>; 195 smp-sram@0 { 197 reg = <0x0 0x1000>; 202 reg = <0x53000 0x1000>; [all …]
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/linux-6.12.1/arch/arm/boot/dts/marvell/ |
D | armada-380.dtsi | 20 #size-cells = <0>; 23 cpu@0 { 26 reg = <0>; 46 bus-range = <0x00 0xff>; 49 <0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 50 0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 51 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 52 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 53 0x82000000 0x1 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 0 MEM */ 54 0x81000000 0x1 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 0 IO */ [all …]
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D | kirkwood-98dx4122.dtsi | 12 bus-range = <0x00 0xff>; 15 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 16 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ 17 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>; 19 pcie0: pcie@1,0 { 21 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>; 22 reg = <0x0800 0 0 0 0>; 26 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 27 0x81000000 0 0 0x81000000 0x1 0 1 0>; 28 bus-range = <0x00 0xff>; [all …]
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/linux-6.12.1/arch/mips/include/asm/mach-ralink/ |
D | rt3883.h | 15 #define RT3883_SDRAM_BASE 0x00000000 16 #define RT3883_SYSC_BASE IOMEM(0x10000000) 17 #define RT3883_TIMER_BASE 0x10000100 18 #define RT3883_INTC_BASE 0x10000200 19 #define RT3883_MEMC_BASE 0x10000300 20 #define RT3883_UART0_BASE 0x10000500 21 #define RT3883_PIO_BASE 0x10000600 22 #define RT3883_FSCC_BASE 0x10000700 23 #define RT3883_NANDC_BASE 0x10000810 24 #define RT3883_I2C_BASE 0x10000900 [all …]
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/linux-6.12.1/arch/arm/boot/dts/amlogic/ |
D | meson6.dtsi | 14 #size-cells = <0>; 20 reg = <0x200>; 27 reg = <0x201>; 33 reg = <0xd0000000 0x40000>; 36 ranges = <0x0 0xd0000000 0x40000>; 39 clk81: clk@0 { 40 #clock-cells = <0>;
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