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/linux-6.12.1/drivers/net/ipa/reg/
Dgsi_reg-v3.5.1.c14 0x0000c020 + 0x1000 * GSI_EE_AP);
17 0x0000c024 + 0x1000 * GSI_EE_AP);
20 [CHTYPE_PROTOCOL] = GENMASK(2, 0),
32 0x0001c000 + 0x4000 * GSI_EE_AP, 0x80);
35 [CH_R_LENGTH] = GENMASK(15, 0),
40 0x0001c004 + 0x4000 * GSI_EE_AP, 0x80);
42 REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x0001c008 + 0x4000 * GSI_EE_AP, 0x80);
44 REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0001c00c + 0x4000 * GSI_EE_AP, 0x80);
47 [WRR_WEIGHT] = GENMASK(3, 0),
54 REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x0001c05c + 0x4000 * GSI_EE_AP, 0x80);
[all …]
Dgsi_reg-v3.1.c14 0x0000c020 + 0x1000 * GSI_EE_AP);
17 0x0000c024 + 0x1000 * GSI_EE_AP);
20 [CHTYPE_PROTOCOL] = GENMASK(2, 0),
32 0x0001c000 + 0x4000 * GSI_EE_AP, 0x80);
35 [CH_R_LENGTH] = GENMASK(15, 0),
40 0x0001c004 + 0x4000 * GSI_EE_AP, 0x80);
42 REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x0001c008 + 0x4000 * GSI_EE_AP, 0x80);
44 REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0001c00c + 0x4000 * GSI_EE_AP, 0x80);
47 [WRR_WEIGHT] = GENMASK(3, 0),
54 REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x0001c05c + 0x4000 * GSI_EE_AP, 0x80);
[all …]
Dgsi_reg-v4.11.c14 0x0000c020 + 0x1000 * GSI_EE_AP);
17 0x0000c024 + 0x1000 * GSI_EE_AP);
20 [CHTYPE_PROTOCOL] = GENMASK(2, 0),
32 0x0000f000 + 0x4000 * GSI_EE_AP, 0x80);
35 [CH_R_LENGTH] = GENMASK(19, 0),
40 0x0000f004 + 0x4000 * GSI_EE_AP, 0x80);
42 REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x0000f008 + 0x4000 * GSI_EE_AP, 0x80);
44 REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0000f00c + 0x4000 * GSI_EE_AP, 0x80);
47 [WRR_WEIGHT] = GENMASK(3, 0),
58 REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x0000f05c + 0x4000 * GSI_EE_AP, 0x80);
[all …]
Dgsi_reg-v4.5.c14 0x0000c020 + 0x1000 * GSI_EE_AP);
17 0x0000c024 + 0x1000 * GSI_EE_AP);
20 [CHTYPE_PROTOCOL] = GENMASK(2, 0),
32 0x0000f000 + 0x4000 * GSI_EE_AP, 0x80);
35 [CH_R_LENGTH] = GENMASK(15, 0),
40 0x0000f004 + 0x4000 * GSI_EE_AP, 0x80);
42 REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x0000f008 + 0x4000 * GSI_EE_AP, 0x80);
44 REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0000f00c + 0x4000 * GSI_EE_AP, 0x80);
47 [WRR_WEIGHT] = GENMASK(3, 0),
57 REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x0000f05c + 0x4000 * GSI_EE_AP, 0x80);
[all …]
Dgsi_reg-v4.0.c14 0x0000c020 + 0x1000 * GSI_EE_AP);
17 0x0000c024 + 0x1000 * GSI_EE_AP);
20 [CHTYPE_PROTOCOL] = GENMASK(2, 0),
32 0x0001c000 + 0x4000 * GSI_EE_AP, 0x80);
35 [CH_R_LENGTH] = GENMASK(15, 0),
40 0x0001c004 + 0x4000 * GSI_EE_AP, 0x80);
42 REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x0001c008 + 0x4000 * GSI_EE_AP, 0x80);
44 REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0001c00c + 0x4000 * GSI_EE_AP, 0x80);
47 [WRR_WEIGHT] = GENMASK(3, 0),
55 REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x0001c05c + 0x4000 * GSI_EE_AP, 0x80);
[all …]
Dgsi_reg-v4.9.c14 0x0000c020 + 0x1000 * GSI_EE_AP);
17 0x0000c024 + 0x1000 * GSI_EE_AP);
20 [CHTYPE_PROTOCOL] = GENMASK(2, 0),
32 0x0000f000 + 0x4000 * GSI_EE_AP, 0x80);
35 [CH_R_LENGTH] = GENMASK(19, 0),
40 0x0000f004 + 0x4000 * GSI_EE_AP, 0x80);
42 REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x0000f008 + 0x4000 * GSI_EE_AP, 0x80);
44 REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0000f00c + 0x4000 * GSI_EE_AP, 0x80);
47 [WRR_WEIGHT] = GENMASK(3, 0),
58 REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x0000f05c + 0x4000 * GSI_EE_AP, 0x80);
[all …]
/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dqoriq-bman-portals.dtsi14 bman-portal@0 {
20 reg = <0x0 0x4000>, <0x4000000 0x4000>;
26 reg = <0x10000 0x4000>, <0x4010000 0x4000>;
32 reg = <0x20000 0x4000>, <0x4020000 0x4000>;
38 reg = <0x30000 0x4000>, <0x4030000 0x4000>;
44 reg = <0x40000 0x4000>, <0x4040000 0x4000>;
50 reg = <0x50000 0x4000>, <0x4050000 0x4000>;
56 reg = <0x60000 0x4000>, <0x4060000 0x4000>;
62 reg = <0x70000 0x4000>, <0x4070000 0x4000>;
68 reg = <0x80000 0x4000>, <0x4080000 0x4000>;
[all …]
Dqoriq-qman-portals.dtsi14 qportal0: qman-portal@0 {
20 reg = <0x0 0x4000>, <0x4000000 0x4000>;
22 cell-index = <0>;
27 reg = <0x10000 0x4000>, <0x4010000 0x4000>;
34 reg = <0x20000 0x4000>, <0x4020000 0x4000>;
41 reg = <0x30000 0x4000>, <0x4030000 0x4000>;
48 reg = <0x40000 0x4000>, <0x4040000 0x4000>;
55 reg = <0x50000 0x4000>, <0x4050000 0x4000>;
62 reg = <0x60000 0x4000>, <0x4060000 0x4000>;
69 reg = <0x70000 0x4000>, <0x4070000 0x4000>;
[all …]
/linux-6.12.1/arch/powerpc/boot/dts/fsl/
Dt4240si-post.dtsi37 alloc-ranges = <0 0 0x10000 0>;
42 alloc-ranges = <0 0 0x10000 0>;
47 alloc-ranges = <0 0 0x10000 0>;
54 interrupts = <25 2 0 0>;
57 /* controller at 0x240000 */
59 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
63 bus-range = <0x0 0xff>;
64 interrupts = <20 2 0 0>;
65 pcie@0 {
70 reg = <0 0 0 0 0>;
[all …]
Db4860si-post.dtsi37 /* controller at 0x200000 */
64 dcsr-epu@0 {
79 reg = <0x13000 0x1000>;
96 reg = <0x108000 0x1000 0x109000 0x1000>;
101 reg = <0x110000 0x1000 0x111000 0x1000>;
106 reg = <0x118000 0x1000 0x119000 0x1000>;
113 reg = <0x38000 0x4000>, <0x100e000 0x1000>;
114 interrupts = <133 2 0 0>;
118 reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
119 interrupts = <135 2 0 0>;
[all …]
Db4si-post.dtsi37 alloc-ranges = <0 0 0x10000 0>;
42 alloc-ranges = <0 0 0x10000 0>;
47 alloc-ranges = <0 0 0x10000 0>;
54 interrupts = <25 2 0 0>;
57 /* controller at 0x200000 */
63 bus-range = <0x0 0xff>;
64 interrupts = <20 2 0 0>;
66 pcie@0 {
71 reg = <0 0 0 0 0>;
72 interrupts = <20 2 0 0>;
[all …]
Dqoriq-bman1-portals.dtsi40 bman-portal@0 {
42 reg = <0x0 0x4000>, <0x100000 0x1000>;
43 interrupts = <105 2 0 0>;
47 reg = <0x4000 0x4000>, <0x101000 0x1000>;
48 interrupts = <107 2 0 0>;
52 reg = <0x8000 0x4000>, <0x102000 0x1000>;
53 interrupts = <109 2 0 0>;
57 reg = <0xc000 0x4000>, <0x103000 0x1000>;
58 interrupts = <111 2 0 0>;
62 reg = <0x10000 0x4000>, <0x104000 0x1000>;
[all …]
Dt2081si-post.dtsi37 alloc-ranges = <0 0 0x10000 0>;
42 alloc-ranges = <0 0 0x10000 0>;
47 alloc-ranges = <0 0 0x10000 0>;
54 interrupts = <25 2 0 0>;
57 /* controller at 0x240000 */
59 compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie";
63 bus-range = <0x0 0xff>;
64 interrupts = <20 2 0 0>;
66 pcie@0 {
67 reg = <0 0 0 0 0>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/nxp/imx/
Dimx25.dtsi47 #size-cells = <0>;
49 cpu@0 {
52 reg = <0>;
60 reg = <0x68000000 0x8000000>;
66 #clock-cells = <0>;
73 #phy-cells = <0>;
78 #phy-cells = <0>;
92 reg = <0x43f00000 0x100000>;
97 reg = <0x43f00000 0x4000>;
102 #size-cells = <0>;
[all …]
Dimx50.dtsi48 #size-cells = <0>;
49 cpu@0 {
52 reg = <0x0>;
60 reg = <0x0fffc000 0x4000>;
66 #clock-cells = <0>;
72 #clock-cells = <0>;
78 #clock-cells = <0>;
79 clock-frequency = <0>;
84 #clock-cells = <0>;
89 usbphy0: usbphy-0 {
[all …]
Dimx31.dtsi35 #size-cells = <0>;
37 cpu@0 {
40 reg = <0>;
48 reg = <0x68000000 0x100000>;
60 reg = <0x1fffc000 0x4000>;
63 ranges = <0 0x1fffc000 0x4000>;
70 reg = <0x43f00000 0x100000>;
75 reg = <0x43f80000 0x4000>;
79 #size-cells = <0>;
85 reg = <0x43f84000 0x4000>;
[all …]
Dimx6sll.dtsi47 #size-cells = <0>;
49 cpu0: cpu@0 {
52 reg = <0>;
82 #clock-cells = <0>;
89 #clock-cells = <0>;
96 #clock-cells = <0>;
97 clock-frequency = <0>;
103 #clock-cells = <0>;
104 clock-frequency = <0>;
117 reg = <0x00900000 0x20000>;
[all …]
Dimx6ul.dtsi58 #size-cells = <0>;
60 cpu0: cpu@0 {
63 reg = <0>;
108 #clock-cells = <0>;
115 #clock-cells = <0>;
122 #clock-cells = <0>;
123 clock-frequency = <0>;
129 #clock-cells = <0>;
130 clock-frequency = <0>;
149 reg = <0x00900000 0x20000>;
[all …]
Dimx6qdl.dtsi59 #clock-cells = <0>;
65 #clock-cells = <0>;
66 clock-frequency = <0>;
71 #clock-cells = <0>;
78 #size-cells = <0>;
83 lvds-channel@0 {
85 #size-cells = <0>;
86 reg = <0>;
89 port@0 {
90 reg = <0>;
[all …]
Dimx53.dtsi51 #size-cells = <0>;
52 cpu0: cpu@0 {
55 reg = <0x0>;
84 reg = <0x0fffc000 0x4000>;
90 #clock-cells = <0>;
96 #clock-cells = <0>;
102 #clock-cells = <0>;
103 clock-frequency = <0>;
108 #clock-cells = <0>;
119 usbphy0: usbphy-0 {
[all …]
Dimx6sx.dtsi61 #size-cells = <0>;
63 cpu0: cpu@0 {
66 reg = <0>;
100 #clock-cells = <0>;
107 #clock-cells = <0>;
114 #clock-cells = <0>;
115 clock-frequency = <0>;
121 #clock-cells = <0>;
122 clock-frequency = <0>;
128 #clock-cells = <0>;
[all …]
Dimx51.dtsi46 reg = <0xe0000000 0x4000>;
52 #clock-cells = <0>;
58 #clock-cells = <0>;
59 clock-frequency = <0>;
64 #clock-cells = <0>;
65 clock-frequency = <0>;
70 #clock-cells = <0>;
77 #size-cells = <0>;
78 cpu: cpu@0 {
81 reg = <0>;
[all …]
Dimx35.dtsi39 #size-cells = <0>;
41 cpu@0 {
44 reg = <0>;
52 reg = <0x68000000 0x10000000>;
64 reg = <0x30000000 0x1000>;
73 reg = <0x43f00000 0x100000>;
78 #size-cells = <0>;
80 reg = <0x43f80000 0x4000>;
89 #size-cells = <0>;
91 reg = <0x43f84000 0x4000>;
[all …]
Dimx6sl.dtsi51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0x0>;
86 #clock-cells = <0>;
92 #clock-cells = <0>;
100 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
105 #phy-cells = <0>;
117 reg = <0x00900000 0x20000>;
118 ranges = <0 0x00900000 0x20000>;
128 reg = <0x00a01000 0x1000>,
[all …]
Dimxrt1050.dtsi19 #clock-cells = <0>;
25 #clock-cells = <0>;
33 reg = <0x40184000 0x4000>;
42 reg = <0x401f8000 0x4000>;
43 fsl,mux_mask = <0x7>;
48 reg = <0x400d8000 0x4000>;
53 reg = <0x400fc000 0x4000>;
75 reg = <0x400e8000 0x4000>,
76 <0x400ec000 0x4000>;
78 interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>, <8>,
[all …]

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