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/linux-6.12.1/drivers/media/usb/gspca/
Ddtcs033.c32 if (gspca_dev->usb_err < 0) in reg_rw()
36 usb_rcvctrlpipe(udev, 0), in reg_rw()
42 if (ret < 0) { in reg_rw()
53 int i = 0; in reg_reqs()
56 while ((i < n_reqs) && (gspca_dev->usb_err >= 0)) { in reg_reqs()
63 if (gspca_dev->usb_err < 0) { in reg_reqs()
111 return 0; in sd_config()
117 return 0; in sd_init()
137 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0); in dtcs033_pkt_scan()
141 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0); in dtcs033_pkt_scan()
[all …]
/linux-6.12.1/drivers/net/wireless/mediatek/mt76/mt76x0/
Dinitvals_phy.h12 { MT_RF(0, 1), 0x01 },
13 { MT_RF(0, 2), 0x11 },
15 { MT_RF(0, 3), 0x73 }, /* VCO Freq Cal */
16 { MT_RF(0, 4), 0x30 }, /* R4 b<7>=1, VCO cal */
17 { MT_RF(0, 5), 0x00 },
18 { MT_RF(0, 6), 0x41 },
19 { MT_RF(0, 7), 0x00 },
20 { MT_RF(0, 8), 0x00 },
21 { MT_RF(0, 9), 0x00 },
22 { MT_RF(0, 10), 0x0C },
[all …]
/linux-6.12.1/drivers/gpu/drm/panel/
Dpanel-novatek-nt36672a.c89 for (i = 0; i < num; i++) { in nt36672a_send_cmds()
92 err = mipi_dsi_dcs_write(pinfo->link, cmd->data[0], cmd->data + 1, 1); in nt36672a_send_cmds()
94 if (err < 0) in nt36672a_send_cmds()
98 return 0; in nt36672a_send_cmds()
104 int ret = 0; in nt36672a_panel_power_off()
124 if (ret < 0) in nt36672a_panel_unprepare()
128 if (ret < 0) in nt36672a_panel_unprepare()
135 if (ret < 0) in nt36672a_panel_unprepare()
138 /* 0x3C = 60ms delay */ in nt36672a_panel_unprepare()
142 if (ret < 0) in nt36672a_panel_unprepare()
[all …]
/linux-6.12.1/drivers/media/usb/gspca/gl860/
Dgl860-mi1320.c11 {0xba00, 0x00f0}, {0xba00, 0x00f1}, {0xba51, 0x0066}, {0xba02, 0x00f1},
12 {0xba05, 0x0067}, {0xba05, 0x00f1}, {0xbaa0, 0x0065}, {0xba00, 0x00f1},
13 {0xffff, 0xffff},
14 {0xba00, 0x00f0}, {0xba02, 0x00f1}, {0xbafa, 0x0028}, {0xba02, 0x00f1},
15 {0xba00, 0x00f0}, {0xba01, 0x00f1}, {0xbaf0, 0x0006}, {0xba0e, 0x00f1},
16 {0xba70, 0x0006}, {0xba0e, 0x00f1},
17 {0xffff, 0xffff},
18 {0xba74, 0x0006}, {0xba0e, 0x00f1},
19 {0xffff, 0xffff},
20 {0x0061, 0x0000}, {0x0068, 0x000d},
[all …]
Dgl860-ov2640.c12 static u8 c61[] = {0x61}; /* expected */
13 static u8 c51[] = {0x51}; /* expected */
14 static u8 c50[] = {0x50}; /* expected */
15 static u8 c28[] = {0x28}; /* expected */
16 static u8 ca8[] = {0xa8}; /* expected */
27 {0x0000, 0x0000}, {0x0010, 0x0010}, {0x0008, 0x00c0}, {0x0001, 0x00c1},
28 {0x0001, 0x00c2}, {0x0020, 0x0006}, {0x006a, 0x000d},
29 {0x0050, 0x0000}, {0x0041, 0x0000}, {0x006a, 0x0007}, {0x0061, 0x0006},
30 {0x006a, 0x000d}, {0x0000, 0x00c0}, {0x0010, 0x0010}, {0x0001, 0x00c1},
31 {0x0041, 0x00c2}, {0x0004, 0x00d8}, {0x0012, 0x0004}, {0x0000, 0x0058},
[all …]
Dgl860-mi2020.c12 static u8 dat_wbal1[] = {0x8c, 0xa2, 0x0c};
14 static u8 dat_bright1[] = {0x8c, 0xa2, 0x06};
15 static u8 dat_bright3[] = {0x8c, 0xa1, 0x02};
16 static u8 dat_bright4[] = {0x90, 0x00, 0x0f};
17 static u8 dat_bright5[] = {0x8c, 0xa1, 0x03};
18 static u8 dat_bright6[] = {0x90, 0x00, 0x05};
20 static u8 dat_hvflip1[] = {0x8c, 0x27, 0x19};
21 static u8 dat_hvflip3[] = {0x8c, 0x27, 0x3b};
22 static u8 dat_hvflip5[] = {0x8c, 0xa1, 0x03};
23 static u8 dat_hvflip6[] = {0x90, 0x00, 0x06};
[all …]
/linux-6.12.1/drivers/net/ethernet/intel/ixgbevf/
Dregs.h7 #define IXGBE_VFCTRL 0x00000
8 #define IXGBE_VFSTATUS 0x00008
9 #define IXGBE_VFLINKS 0x00010
10 #define IXGBE_VFFRTIMER 0x00048
11 #define IXGBE_VFRXMEMWRAP 0x03190
12 #define IXGBE_VTEICR 0x00100
13 #define IXGBE_VTEICS 0x00104
14 #define IXGBE_VTEIMS 0x00108
15 #define IXGBE_VTEIMC 0x0010C
16 #define IXGBE_VTEIAC 0x00110
[all …]
/linux-6.12.1/drivers/scsi/aic7xxx/
Daic7xxx_reg_print.c_shipped12 { "SCSIRSTO", 0x01, 0x01 },
13 { "ENAUTOATNP", 0x02, 0x02 },
14 { "ENAUTOATNI", 0x04, 0x04 },
15 { "ENAUTOATNO", 0x08, 0x08 },
16 { "ENRSELI", 0x10, 0x10 },
17 { "ENSELI", 0x20, 0x20 },
18 { "ENSELO", 0x40, 0x40 },
19 { "TEMODE", 0x80, 0x80 }
26 0x00, regvalue, cur_col, wrap));
30 { "CLRCHN", 0x02, 0x02 },
[all …]
Daic79xx_reg_print.c_shipped12 { "SPLTINT", 0x01, 0x01 },
13 { "CMDCMPLT", 0x02, 0x02 },
14 { "SEQINT", 0x04, 0x04 },
15 { "SCSIINT", 0x08, 0x08 },
16 { "PCIINT", 0x10, 0x10 },
17 { "SWTMINT", 0x20, 0x20 },
18 { "BRKADRINT", 0x40, 0x40 },
19 { "HWERRINT", 0x80, 0x80 },
20 { "INT_PEND", 0xff, 0xff }
27 0x01, regvalue, cur_col, wrap));
[all …]
Daic7xxx_reg.h_shipped19 ahc_print_register(NULL, 0, "SCSISEQ", 0x00, regvalue, cur_col, wrap)
26 ahc_print_register(NULL, 0, "SXFRCTL0", 0x01, regvalue, cur_col, wrap)
33 ahc_print_register(NULL, 0, "SCSISIGI", 0x03, regvalue, cur_col, wrap)
40 ahc_print_register(NULL, 0, "SCSIRATE", 0x04, regvalue, cur_col, wrap)
47 ahc_print_register(NULL, 0, "SSTAT0", 0x0b, regvalue, cur_col, wrap)
54 ahc_print_register(NULL, 0, "SSTAT1", 0x0c, regvalue, cur_col, wrap)
61 ahc_print_register(NULL, 0, "SSTAT2", 0x0d, regvalue, cur_col, wrap)
68 ahc_print_register(NULL, 0, "SSTAT3", 0x0e, regvalue, cur_col, wrap)
75 ahc_print_register(NULL, 0, "SIMODE0", 0x10, regvalue, cur_col, wrap)
82 ahc_print_register(NULL, 0, "SIMODE1", 0x11, regvalue, cur_col, wrap)
[all …]
Daic79xx_reg.h_shipped19 ahd_print_register(NULL, 0, "INTSTAT", 0x01, regvalue, cur_col, wrap)
26 ahd_print_register(NULL, 0, "HS_MAILBOX", 0x0b, regvalue, cur_col, wrap)
33 ahd_print_register(NULL, 0, "SEQINTSTAT", 0x0c, regvalue, cur_col, wrap)
40 ahd_print_register(NULL, 0, "INTCTL", 0x18, regvalue, cur_col, wrap)
47 ahd_print_register(NULL, 0, "DFCNTRL", 0x19, regvalue, cur_col, wrap)
54 ahd_print_register(NULL, 0, "DFSTATUS", 0x1a, regvalue, cur_col, wrap)
61 ahd_print_register(NULL, 0, "SG_CACHE_SHADOW", 0x1b, regvalue, cur_col, wrap)
68 ahd_print_register(NULL, 0, "SCSISEQ0", 0x3a, regvalue, cur_col, wrap)
75 ahd_print_register(NULL, 0, "SCSISEQ1", 0x3b, regvalue, cur_col, wrap)
82 ahd_print_register(NULL, 0, "DFFSTAT", 0x3f, regvalue, cur_col, wrap)
[all …]
/linux-6.12.1/drivers/net/ethernet/microchip/
Denc28j60_hw.h15 * - Register address (bits 0-4)
19 #define ADDR_MASK 0x1F
20 #define BANK_MASK 0x60
21 #define SPRD_MASK 0x80
23 #define EIE 0x1B
24 #define EIR 0x1C
25 #define ESTAT 0x1D
26 #define ECON2 0x1E
27 #define ECON1 0x1F
28 /* Bank 0 registers */
[all …]
/linux-6.12.1/include/linux/mfd/da9052/
Dreg.h14 #define DA9052_PAGE0_CON_REG 0
176 #define DA9052_PAGE_CONF 0X80
179 #define DA9052_STATUSA_VDATDET 0X80
180 #define DA9052_STATUSA_VBUSSEL 0X40
181 #define DA9052_STATUSA_DCINSEL 0X20
182 #define DA9052_STATUSA_VBUSDET 0X10
183 #define DA9052_STATUSA_DCINDET 0X08
184 #define DA9052_STATUSA_IDGND 0X04
185 #define DA9052_STATUSA_IDFLOAT 0X02
186 #define DA9052_STATUSA_NONKEY 0X01
[all …]
/linux-6.12.1/include/linux/
Dtermios_internal.h9 eof=^D vtime=\0 vmin=\1 sxtc=\0
10 start=^Q stop=^S susp=^Z eol=\0
12 eol2=\0
16 #define INIT_C_CC_VDSUSP_EXTRA [VDSUSP] = 'Y'-0x40,
22 [VINTR] = 'C'-0x40, \
23 [VQUIT] = '\\'-0x40, \
25 [VKILL] = 'U'-0x40, \
26 [VEOF] = 'D'-0x40, \
27 [VSTART] = 'Q'-0x40, \
28 [VSTOP] = 'S'-0x40, \
[all …]
/linux-6.12.1/drivers/isdn/hardware/mISDN/
Dhfc_multi.h6 #define DEBUG_HFCMULTI_FIFO 0x00010000
7 #define DEBUG_HFCMULTI_CRC 0x00020000
8 #define DEBUG_HFCMULTI_INIT 0x00040000
9 #define DEBUG_HFCMULTI_PLXSD 0x00080000
10 #define DEBUG_HFCMULTI_MODE 0x00100000
11 #define DEBUG_HFCMULTI_MSG 0x00200000
12 #define DEBUG_HFCMULTI_STATE 0x00400000
13 #define DEBUG_HFCMULTI_FILL 0x00800000
14 #define DEBUG_HFCMULTI_SYNC 0x01000000
15 #define DEBUG_HFCMULTI_DTMF 0x02000000
[all …]
/linux-6.12.1/arch/sparc/lib/
Dcopy_page.S31 #define PAGE_SIZE_REM 0x80
33 #define PAGE_SIZE_REM 0x100
88 wrpr %o2, 0x0, %pstate
99 prefetch [%o1 + 0x000], #one_read
101 prefetch [%o1 + 0x040], #one_read
102 prefetch [%o1 + 0x080], #one_read
103 prefetch [%o1 + 0x0c0], #one_read
104 ldd [%o1 + 0x000], %f0
105 prefetch [%o1 + 0x100], #one_read
106 ldd [%o1 + 0x008], %f2
[all …]
/linux-6.12.1/drivers/video/fbdev/i810/
Di810_dvt.c21 { 25000, 0x0013, 0x0003, 0x40, 0x5F, 0x4F, 0x50, 0x82, 0x51, 0x9D,
22 0x0B, 0x10, 0x40, 0xE9, 0x0B, 0xDF, 0x50, 0xE7, 0x04, 0x02,
23 0x01, 0x01, 0x01, 0x00, 0x01, 0x22002000, 0x22004000, 0x22006000,
24 0x22002000, 0x22004000, 0x22006000, 0xC0 },
27 { 28000, 0x0053, 0x0010, 0x40, 0x61, 0x4F, 0x4F, 0x85, 0x52, 0x9A,
28 0xF2, 0x10, 0x40, 0xE0, 0x03, 0xDF, 0x50, 0xDF, 0xF3, 0x01,
29 0x01, 0x01, 0x01, 0x00, 0x01, 0x22002000, 0x22004000, 0x22005000,
30 0x22002000, 0x22004000, 0x22005000, 0xC0 },
33 { 31000, 0x0013, 0x0002, 0x40, 0x63, 0x4F, 0x4F, 0x87, 0x52, 0x97,
34 0x06, 0x0F, 0x40, 0xE8, 0x0B, 0xDF, 0x50, 0xDF, 0x07, 0x02,
[all …]
/linux-6.12.1/drivers/media/i2c/
Dov64a40.c30 #define OV64A40_PIXEL_ARRAY_TOP 0
31 #define OV64A40_PIXEL_ARRAY_LEFT 0
40 #define OV64A40_PLL1_PRE_DIV0 CCI_REG8(0x0301)
41 #define OV64A40_PLL1_PRE_DIV CCI_REG8(0x0303)
42 #define OV64A40_PLL1_MULTIPLIER CCI_REG16(0x0304)
43 #define OV64A40_PLL1_M_DIV CCI_REG8(0x0307)
44 #define OV64A40_PLL2_SEL_BAK_SA1 CCI_REG8(0x0320)
45 #define OV64A40_PLL2_PRE_DIV CCI_REG8(0x0323)
46 #define OV64A40_PLL2_MULTIPLIER CCI_REG16(0x0324)
47 #define OV64A40_PLL2_PRE_DIV0 CCI_REG8(0x0326)
[all …]
/linux-6.12.1/drivers/phy/freescale/
Dphy-fsl-samsung-hdmi.c17 #define PHY_REG_00 0x00
18 #define PHY_REG_01 0x04
19 #define PHY_REG_02 0x08
20 #define PHY_REG_08 0x20
21 #define PHY_REG_09 0x24
22 #define PHY_REG_10 0x28
23 #define PHY_REG_11 0x2c
25 #define PHY_REG_12 0x30
28 #define PHY_REG_13 0x34
29 #define REG13_TG_CODE_LOW_MASK GENMASK(7, 0)
[all …]
/linux-6.12.1/include/linux/mlx5/
Dmlx5_ifc_fpga.h36 u8 max_num_qps[0x10];
37 u8 reserved_at_10[0x8];
38 u8 total_rcv_credits[0x8];
40 u8 reserved_at_20[0xe];
41 u8 qp_type[0x2];
42 u8 reserved_at_30[0x5];
43 u8 rae[0x1];
44 u8 rwe[0x1];
45 u8 rre[0x1];
46 u8 reserved_at_38[0x4];
[all …]
Dmlx5_ifc_vdpa.h8 MLX5_VIRTIO_Q_EVENT_MODE_NO_MSIX_MODE = 0x0,
9 MLX5_VIRTIO_Q_EVENT_MODE_QP_MODE = 0x1,
10 MLX5_VIRTIO_Q_EVENT_MODE_MSIX_MODE = 0x2,
14 MLX5_VIRTIO_EMULATION_VIRTIO_QUEUE_TYPE_SPLIT = 0,
26 u8 virtio_q_type[0x8];
27 u8 reserved_at_8[0x5];
28 u8 event_mode[0x3];
29 u8 queue_index[0x10];
31 u8 full_emulation[0x1];
32 u8 virtio_version_1_0[0x1];
[all …]
/linux-6.12.1/include/linux/mfd/da9063/
Dregisters.h18 /* Page 0 : I2C access 0x000 - 0x0FF SPI access 0x000 - 0x07F */
19 /* Page 1 : SPI access 0x080 - 0x0FF */
20 /* Page 2 : I2C access 0x100 - 0x1FF SPI access 0x100 - 0x17F */
21 /* Page 3 : SPI access 0x180 - 0x1FF */
22 #define DA9063_REG_PAGE_CON 0x00
25 #define DA9063_REG_STATUS_A 0x01
26 #define DA9063_REG_STATUS_B 0x02
27 #define DA9063_REG_STATUS_C 0x03
28 #define DA9063_REG_STATUS_D 0x04
29 #define DA9063_REG_FAULT_LOG 0x05
[all …]
/linux-6.12.1/arch/s390/crypto/
Dchacha-s390.S20 .long 0x61707865,0x3320646e,0x79622d32,0x6b206574 # endian-neutral
21 .long 1,0,0,0
22 .long 2,0,0,0
23 .long 3,0,0,0
24 .long 0x03020100,0x07060504,0x0b0a0908,0x0f0e0d0c # byte swap
26 .long 0,1,2,3
27 .long 0x61707865,0x61707865,0x61707865,0x61707865 # smashed sigma
28 .long 0x3320646e,0x3320646e,0x3320646e,0x3320646e
29 .long 0x79622d32,0x79622d32,0x79622d32,0x79622d32
30 .long 0x6b206574,0x6b206574,0x6b206574,0x6b206574
[all …]
/linux-6.12.1/sound/soc/intel/keembay/
Dkmb_platform.h19 #define IER 0x000
20 #define IRER 0x004
21 #define ITER 0x008
22 #define CER 0x00C
23 #define CCR 0x010
24 #define RXFFR 0x014
25 #define TXFFR 0x018
31 #define ISR_RXDA BIT(0)
34 #define LRBR_LTHR(x) (0x40 * (x) + 0x020)
35 #define RRBR_RTHR(x) (0x40 * (x) + 0x024)
[all …]
/linux-6.12.1/drivers/net/ethernet/intel/igbvf/
Dregs.h7 #define E1000_CTRL 0x00000 /* Device Control - RW */
8 #define E1000_STATUS 0x00008 /* Device Status - RO */
9 #define E1000_ITR 0x000C4 /* Interrupt Throttling Rate - RW */
10 #define E1000_EICR 0x01580 /* Ext. Interrupt Cause Read - R/clr */
11 #define E1000_EITR(_n) (0x01680 + (0x4 * (_n)))
12 #define E1000_EICS 0x01520 /* Ext. Interrupt Cause Set - W0 */
13 #define E1000_EIMS 0x01524 /* Ext. Interrupt Mask Set/Read - RW */
14 #define E1000_EIMC 0x01528 /* Ext. Interrupt Mask Clear - WO */
15 #define E1000_EIAC 0x0152C /* Ext. Interrupt Auto Clear - RW */
16 #define E1000_EIAM 0x01530 /* Ext. Interrupt Ack Auto Clear Mask - RW */
[all …]

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