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/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dsophgo,sg2042-clkgen.yaml23 - description: DDR PLL 0
51 reg = <0x30012000 0x1000>;
52 clocks = <&pllclk 0>,
/linux-6.12.1/arch/riscv/boot/dts/sophgo/
Dsg2042.dtsi28 #clock-cells = <0>;
34 #clock-cells = <0>;
40 #clock-cells = <0>;
52 reg = <0x70 0x30005000 0x0 0x1000>;
54 #size-cells = <0>;
65 reg = <0x70 0x30006000 0x0 0x1000>;
67 #size-cells = <0>;
78 reg = <0x70 0x30007000 0x0 0x1000>;
80 #size-cells = <0>;
91 reg = <0x70 0x30008000 0x0 0x1000>;
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