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/linux-6.12.1/drivers/mtd/maps/
Dsbc_gxx.c15 16 KiB memory window at 0xdc000-0xdffff
19 0x258
20 bit 0-7: address bit 14-21
21 0x259
22 bit 0-1: address bit 22-23
23 bit 7: 0 - reset/powered down
48 #define WINDOW_START 0xdc000
56 #define PAGE_IO 0x258
59 /* bit 7 of 0x259 must be 1 to enable device. */
60 #define DEVICE_ENABLE 0x8000
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/linux-6.12.1/Documentation/devicetree/bindings/sound/
Drenesas,rz-ssi.yaml65 bits[0:9] - Specifies MID/RID value of a SSI channel as below
66 MID/RID value of SSI rx0 = 0x256
67 MID/RID value of SSI tx0 = 0x255
68 MID/RID value of SSI rx1 = 0x25a
69 MID/RID value of SSI tx1 = 0x259
70 MID/RID value of SSI rt2 = 0x25f
71 MID/RID value of SSI rx3 = 0x262
72 MID/RID value of SSI tx3 = 0x261
75 bit[11] - LVL = 0, Detects based on the edge
77 bit[15] - TM = 0, Single transfer mode
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/linux-6.12.1/drivers/usb/serial/
Dsafe_serial.c35 * 0..N-2 data and optional padding
38 * bits 1-0 top two bits of 10 bit CRC
43 * + 7 . 6 . 5 . 4 . 3 . 2 . 1 . 0 | 7 . 6 . 5 . 4 . 3 . 2 . 1 . 0 +
85 module_param(safe, bool, 0);
88 module_param(padded, bool, 0);
91 #define CDC_DEVICE_CLASS 0x02
93 #define CDC_INTERFACE_CLASS 0x02
94 #define CDC_INTERFACE_SUBCLASS 0x06
96 #define LINEO_INTERFACE_CLASS 0xff
98 #define LINEO_INTERFACE_SUBCLASS_SAFENET 0x01
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/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/inc/
Dsmu7_ppsmc.h30 #define PPSMC_MSG_SetGBDroopSettings ((uint16_t) 0x305)
32 #define PPSMC_SWSTATE_FLAG_DC 0x01
33 #define PPSMC_SWSTATE_FLAG_UVD 0x02
34 #define PPSMC_SWSTATE_FLAG_VCE 0x04
36 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
37 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
38 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
40 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
41 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
42 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
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Dtonga_ppsmc.h29 #define PPSMC_SWSTATE_FLAG_DC 0x01
30 #define PPSMC_SWSTATE_FLAG_UVD 0x02
31 #define PPSMC_SWSTATE_FLAG_VCE 0x04
32 #define PPSMC_SWSTATE_FLAG_PCIE_X1 0x08
34 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
35 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
36 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
38 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
39 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
40 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
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Dfiji_ppsmc.h30 #define PPSMC_SWSTATE_FLAG_DC 0x01
31 #define PPSMC_SWSTATE_FLAG_UVD 0x02
32 #define PPSMC_SWSTATE_FLAG_VCE 0x04
34 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
35 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
36 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
38 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
39 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
40 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
42 #define PPSMC_SYSTEMFLAG_DISABLE_BABYSTEP 0x08
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/linux-6.12.1/sound/drivers/opl4/
Dopl4_synth.c41 #define MIDI_CTL_RELEASE_TIME 0x48
42 #define MIDI_CTL_ATTACK_TIME 0x49
43 #define MIDI_CTL_DECAY_TIME 0x4b
44 #define MIDI_CTL_VIBRATO_RATE 0x4c
45 #define MIDI_CTL_VIBRATO_DEPTH 0x4d
46 #define MIDI_CTL_VIBRATO_DELAY 0x4e
52 static const s16 snd_opl4_pitch_map[0x600] = {
53 0x000,0x000,0x001,0x001,0x002,0x002,0x003,0x003,
54 0x004,0x004,0x005,0x005,0x006,0x006,0x006,0x007,
55 0x007,0x008,0x008,0x009,0x009,0x00a,0x00a,0x00b,
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/linux-6.12.1/drivers/media/usb/gspca/
Dstk1135.c51 if (gspca_dev->usb_err < 0) in reg_r()
52 return 0; in reg_r()
53 ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), in reg_r()
54 0x00, in reg_r()
56 0x00, in reg_r()
61 gspca_dbg(gspca_dev, D_USBI, "reg_r 0x%x=0x%02x\n", in reg_r()
62 index, gspca_dev->usb_buf[0]); in reg_r()
63 if (ret < 0) { in reg_r()
64 pr_err("reg_r 0x%x err %d\n", index, ret); in reg_r()
66 return 0; in reg_r()
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/linux-6.12.1/drivers/media/i2c/
Dmax96714.c23 #define MAX96714_DEVICE_ID 0xc9
24 #define MAX96714F_DEVICE_ID 0xca
26 #define MAX96714_PAD_SINK 0
31 #define MAX96714_REG13 CCI_REG8(0x0d)
32 #define MAX96714_DEV_REV CCI_REG8(0x0e)
33 #define MAX96714_DEV_REV_MASK GENMASK(3, 0)
34 #define MAX96714_LINK_LOCK CCI_REG8(0x13)
36 #define MAX96714_IO_CHK0 CCI_REG8(0x38)
37 #define MAX96714_PATTERN_CLK_FREQ GENMASK(1, 0)
39 #define MAX96714_VIDEO_RX8 CCI_REG8(0x11a)
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Dmax96717.c23 #define MAX96717_DEVICE_ID 0xbf
24 #define MAX96717F_DEVICE_ID 0xc8
26 #define MAX96717_PAD_SINK 0
33 #define MAX96717_REG3 CCI_REG8(0x3)
34 #define MAX96717_RCLKSEL GENMASK(1, 0)
35 #define RCLKSEL_REF_PLL CCI_REG8(0x3)
36 #define MAX96717_REG6 CCI_REG8(0x6)
38 #define MAX96717_DEV_ID CCI_REG8(0xd)
39 #define MAX96717_DEV_REV CCI_REG8(0xe)
40 #define MAX96717_DEV_REV_MASK GENMASK(3, 0)
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/linux-6.12.1/include/drm/display/
Ddrm_dp_helper.h154 return dpcd[DP_DPCD_REV] >= 0x11 && in drm_dp_enhanced_frame_cap()
161 return dpcd[DP_DPCD_REV] >= 0x11 && in drm_dp_fast_training_cap()
168 return dpcd[DP_DPCD_REV] >= 0x12 && in drm_dp_tps3_supported()
175 return dpcd[DP_DPCD_REV] >= 0x11 || in drm_dp_max_downspread()
182 return dpcd[DP_DPCD_REV] >= 0x14 && in drm_dp_tps4_supported()
189 return (dpcd[DP_DPCD_REV] >= 0x14) ? DP_TRAINING_PATTERN_MASK_1_4 : in drm_dp_training_pattern_mask()
484 * This function returns 0 if HPD was asserted or -ETIMEDOUT if time
489 * readx_poll_timeout() function. That means a `wait_us` of 0 means
650 * @ident: DP device identification from DPCD 0x400 (sink) or 0x500 (branch).
675 * to 16 bits. So will give a constant value (0x8000) for compatability.
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Ddrm_dp.h44 #define DP_MSA_MISC_SYNC_CLOCK (1 << 0)
46 #define DP_MSA_MISC_STEREO_NO_3D (0 << 9)
50 #define DP_MSA_MISC_6_BPC (0 << 5)
66 #define DP_MSA_MISC_COLOR_RGB _DP_MSA_MISC_COLOR(0, 0, 0, 0)
67 #define DP_MSA_MISC_COLOR_CEA_RGB _DP_MSA_MISC_COLOR(0, 0, 1, 0)
68 #define DP_MSA_MISC_COLOR_RGB_WIDE_FIXED _DP_MSA_MISC_COLOR(0, 3, 0, 0)
69 #define DP_MSA_MISC_COLOR_RGB_WIDE_FLOAT _DP_MSA_MISC_COLOR(0, 3, 0, 1)
70 #define DP_MSA_MISC_COLOR_Y_ONLY _DP_MSA_MISC_COLOR(1, 0, 0, 0)
71 #define DP_MSA_MISC_COLOR_RAW _DP_MSA_MISC_COLOR(1, 1, 0, 0)
72 #define DP_MSA_MISC_COLOR_YCBCR_422_BT601 _DP_MSA_MISC_COLOR(0, 1, 1, 0)
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/linux-6.12.1/arch/x86/kernel/cpu/mce/
Damd.c33 #define THRESHOLD_MAX 0xFFF
34 #define INT_TYPE_APIC 0x00020000
35 #define MASK_VALID_HI 0x80000000
36 #define MASK_CNTP_HI 0x40000000
37 #define MASK_LOCKED_HI 0x20000000
38 #define MASK_LVTOFF_HI 0x00F00000
39 #define MASK_COUNT_EN_HI 0x00080000
40 #define MASK_INT_TYPE_HI 0x00060000
41 #define MASK_OVERFLOW_HI 0x00010000
42 #define MASK_ERR_COUNT_HI 0x00000FFF
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/linux-6.12.1/drivers/input/misc/
Dad714x.c16 #define AD714X_PWR_CTRL 0x0
17 #define AD714X_STG_CAL_EN_REG 0x1
18 #define AD714X_AMB_COMP_CTRL0_REG 0x2
19 #define AD714X_PARTID_REG 0x17
20 #define AD7142_PARTID 0xE620
21 #define AD7143_PARTID 0xE630
22 #define AD7147_PARTID 0x1470
23 #define AD7148_PARTID 0x1480
24 #define AD714X_STAGECFG_REG 0x80
25 #define AD714X_SYSCFG_REG 0x0
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/linux-6.12.1/drivers/hwmon/
Daquacomputer_d5next.c7 * Aquacomputer devices send HID reports (with ID 0x01) every second to report
27 #define USB_VENDOR_ID_AQUACOMPUTER 0x0c70
28 #define USB_PRODUCT_ID_AQUAERO 0xf001
29 #define USB_PRODUCT_ID_FARBWERK 0xf00a
30 #define USB_PRODUCT_ID_QUADRO 0xf00d
31 #define USB_PRODUCT_ID_D5NEXT 0xf00e
32 #define USB_PRODUCT_ID_FARBWERK360 0xf010
33 #define USB_PRODUCT_ID_OCTO 0xf011
34 #define USB_PRODUCT_ID_HIGHFLOWNEXT 0xf012
35 #define USB_PRODUCT_ID_LEAKSHIELD 0xf014
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/linux-6.12.1/drivers/net/wireless/broadcom/b43/
Dphy_n.h11 #define B43_NPHY_BBCFG B43_PHY_N(0x001) /* BB config */
12 #define B43_NPHY_BBCFG_RSTCCA 0x4000 /* Reset CCA */
13 #define B43_NPHY_BBCFG_RSTRX 0x8000 /* Reset RX */
14 #define B43_NPHY_CHANNEL B43_PHY_N(0x005) /* Channel */
15 #define B43_NPHY_TXERR B43_PHY_N(0x007) /* TX error */
16 #define B43_NPHY_BANDCTL B43_PHY_N(0x009) /* Band control */
17 #define B43_NPHY_BANDCTL_5GHZ 0x0001 /* Use the 5GHz band */
18 #define B43_NPHY_4WI_ADDR B43_PHY_N(0x00B) /* Four-wire bus address */
19 #define B43_NPHY_4WI_DATAHI B43_PHY_N(0x00C) /* Four-wire bus data high */
20 #define B43_NPHY_4WI_DATALO B43_PHY_N(0x00D) /* Four-wire bus data low */
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/linux-6.12.1/drivers/hid/bpf/progs/
Dhid_report_helpers.h22 * returns 0, which allows using it everywhere an expression
27 0 * (int) sizeof( \
36 #define i4(v_) (((__u8)(v_) & 0xf) + must_be((v_) >= -0x8 && (v_) <= 0x7, "not a i4"))
37 #define i8(v_) ((__u8)(v_) + must_be((v_) >= -0x80 && (v_) <= 0xff, "not a i8/u8"))
38 #define i16(v_) ((__u16)(v_) + must_be((v_) >= -0x8000 && (v_) <= 0xffff, "not a i16/u16"))
39 #define i32(v_) ((__u32)(v_) + must_be((v_) >= -0x80000000L && (v_) <= 0xffffffffL, \
43 #define LE16(v_) i16(v_) & 0xff, ((v_) >> 8) & 0xff
44 #define LE32(v_) i32(v_) & 0xff, ((v_) >> 8) & 0xff, ((v_) >> 16) & 0xff, ((v_) >> 24) & 0xff
47 * of the collection (0xa?) and the EndCollection item (0xc?).
55 * LogicalRange_i8(0, 1)
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