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/linux-6.12.1/Documentation/devicetree/bindings/soc/sprd/
Dsprd,sc9863a-glbregs.yaml33 "@[0-9a-f]+$":
43 reg = <0x20e00000 0x4000>;
44 ranges = <0 0x20e00000 0x4000>;
48 apahb_gate: apahb-gate@0 {
50 reg = <0x0 0x1020>;
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dsprd,sc9863a-clk.yaml81 reg = <0x21500000 0x1000>;
90 reg = <0x20e00000 0x4000>;
93 ranges = <0 0x20e00000 0x4000>;
95 apahb_gate: apahb-gate@0 {
97 reg = <0x0 0x1020>;
/linux-6.12.1/arch/arm64/boot/dts/sprd/
Dsharkl3.dtsi22 reg = <0 0x20e00000 0 0x4000>;
25 ranges = <0 0 0x20e00000 0x4000>;
27 apahb_gate: apahb-gate@0 {
29 reg = <0x0 0x1020>;
37 reg = <0 0x402b0000 0 0x4000>;
40 ranges = <0 0 0x402b0000 0x4000>;
42 pmu_gate: pmu-gate@0 {
44 reg = <0 0x1200>;
54 reg = <0 0x402e0000 0 0x4000>;
57 ranges = <0 0 0x402e0000 0x4000>;
[all …]
/linux-6.12.1/drivers/soc/tegra/cbb/
Dtegra194-cbb.c27 #define ERRLOGGER_0_ID_COREID_0 0x00000000
28 #define ERRLOGGER_0_ID_REVISIONID_0 0x00000004
29 #define ERRLOGGER_0_FAULTEN_0 0x00000008
30 #define ERRLOGGER_0_ERRVLD_0 0x0000000c
31 #define ERRLOGGER_0_ERRCLR_0 0x00000010
32 #define ERRLOGGER_0_ERRLOG0_0 0x00000014
33 #define ERRLOGGER_0_ERRLOG1_0 0x00000018
34 #define ERRLOGGER_0_RSVD_00_0 0x0000001c
35 #define ERRLOGGER_0_ERRLOG3_0 0x00000020
36 #define ERRLOGGER_0_ERRLOG4_0 0x00000024
[all …]
/linux-6.12.1/arch/m68k/fpsp040/
Dstan.S27 | k = N mod 2, so in particular, k = 0 or 1.
62 BOUNDS1: .long 0x3FD78000,0x4004BC7E
63 TWOBYPI: .long 0x3FE45F30,0x6DC9C883
65 TANQ4: .long 0x3EA0B759,0xF50F8688
66 TANP3: .long 0xBEF2BAA5,0xA8924F04
68 TANQ3: .long 0xBF346F59,0xB39BA65F,0x00000000,0x00000000
70 TANP2: .long 0x3FF60000,0xE073D3FC,0x199C4A00,0x00000000
72 TANQ2: .long 0x3FF90000,0xD23CD684,0x15D95FA1,0x00000000
74 TANP1: .long 0xBFFC0000,0x8895A6C5,0xFB423BCA,0x00000000
76 TANQ1: .long 0xBFFD0000,0xEEF57E0D,0xA84BC8CE,0x00000000
[all …]
/linux-6.12.1/drivers/clk/sprd/
Dsc9863a-clk.c26 static SPRD_PLL_SC_GATE_CLK_FW_NAME(mpll0_gate, "mpll0-gate", "ext-26m", 0x94,
27 0x1000, BIT(0), CLK_IGNORE_UNUSED, 0, 240);
28 static SPRD_PLL_SC_GATE_CLK_FW_NAME(dpll0_gate, "dpll0-gate", "ext-26m", 0x98,
29 0x1000, BIT(0), 0, 0, 240);
30 static SPRD_PLL_SC_GATE_CLK_FW_NAME(lpll_gate, "lpll-gate", "ext-26m", 0x9c,
31 0x1000, BIT(0), 0, 0, 240);
32 static SPRD_PLL_SC_GATE_CLK_FW_NAME(gpll_gate, "gpll-gate", "ext-26m", 0xa8,
33 0x1000, BIT(0), 0, 0, 240);
34 static SPRD_PLL_SC_GATE_CLK_FW_NAME(dpll1_gate, "dpll1-gate", "ext-26m", 0x1dc,
35 0x1000, BIT(0), 0, 0, 240);
[all …]
/linux-6.12.1/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
Dtable.c9 0x024, 0x0011800d,
10 0x028, 0x00ffdb83,
11 0x014, 0x088ba955,
12 0x010, 0x49022b03,
13 0x800, 0x80040002,
14 0x804, 0x00000003,
15 0x808, 0x0000fc00,
16 0x80c, 0x0000000a,
17 0x810, 0x80706388,
18 0x814, 0x020c3d10,
[all …]
/linux-6.12.1/arch/arc/net/
Dbpf_jit_arcv2.c91 #define REG_LO(r) (bpf2arc[(r)][0])
110 ZZ_4_byte = 0,
126 AA_none = 0,
134 X_zero = 0,
140 CC_always = 0, /* condition is true all the time */
155 #define IN_U6_RANGE(x) ((x) <= (0x40 - 1) && (x) >= 0)
156 #define IN_S9_RANGE(x) ((x) <= (0x100 - 1) && (x) >= -0x100)
157 #define IN_S12_RANGE(x) ((x) <= (0x800 - 1) && (x) >= -0x800)
158 #define IN_S21_RANGE(x) ((x) <= (0x100000 - 1) && (x) >= -0x100000)
159 #define IN_S25_RANGE(x) ((x) <= (0x1000000 - 1) && (x) >= -0x1000000)
[all …]
/linux-6.12.1/arch/m68k/ifpsp060/
Dfpsp.sa1 .long 0x60ff0000,0x17400000,0x60ff0000,0x15f40000
2 .long 0x60ff0000,0x02b60000,0x60ff0000,0x04700000
3 .long 0x60ff0000,0x1b100000,0x60ff0000,0x19aa0000
4 .long 0x60ff0000,0x1b5a0000,0x60ff0000,0x062e0000
5 .long 0x60ff0000,0x102c0000,0x51fc51fc,0x51fc51fc
6 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
7 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
8 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
9 .long 0x2f00203a,0xff2c487b,0x0930ffff,0xfef8202f
10 .long 0x00044e74,0x00042f00,0x203afef2,0x487b0930
[all …]
/linux-6.12.1/arch/m68k/ifpsp060/src/
Dfplsp.S37 short 0x0000
39 short 0x0000
41 short 0x0000
44 short 0x0000
46 short 0x0000
48 short 0x0000
51 short 0x0000
53 short 0x0000
55 short 0x0000
58 short 0x0000
[all …]
Dfpsp.S43 set _off_bsun, 0x00
44 set _off_snan, 0x04
45 set _off_operr, 0x08
46 set _off_ovfl, 0x0c
47 set _off_unfl, 0x10
48 set _off_dz, 0x14
49 set _off_inex, 0x18
50 set _off_fline, 0x1c
51 set _off_fpu_dis, 0x20
52 set _off_trap, 0x24
[all …]