Searched +full:0 +full:x1880000 (Results 1 – 6 of 6) sorted by relevance
/linux-6.12.1/Documentation/devicetree/bindings/net/ |
D | mscc,vsc7514-switch.yaml | 132 reg = <0x1010000 0x10000>, 133 <0x1030000 0x10000>, 134 <0x1080000 0x100>, 135 <0x10e0000 0x10000>, 136 <0x11e0000 0x100>, 137 <0x11f0000 0x100>, 138 <0x1200000 0x100>, 139 <0x1210000 0x100>, 140 <0x1220000 0x100>, 141 <0x1230000 0x100>, [all …]
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/linux-6.12.1/arch/mips/boot/dts/mscc/ |
D | ocelot.dtsi | 11 #size-cells = <0>; 13 cpu@0 { 17 reg = <0>; 26 #address-cells = <0>; 34 #clock-cells = <0>; 40 #clock-cells = <0>; 50 ranges = <0 0x70000000 0x2000000>; 54 cpu_ctrl: syscon@0 { 56 reg = <0x0 0x2c>; 61 reg = <0x70 0x70>; [all …]
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/linux-6.12.1/arch/arm/boot/dts/hisilicon/ |
D | hisi-x5hd2.dtsi | 20 #address-cells = <0>; 23 reg = <0xf8a01000 0x1000>, <0xf8a00100 0x100>; 31 ranges = <0 0xf8000000 0x8000000>; 41 reg = <0x00002000 0x1000>; 43 interrupts = <0 24 4>; 55 reg = <0x00a29000 0x1000>; 57 interrupts = <0 25 4>; 64 reg = <0x00a2a000 0x1000>; 66 interrupts = <0 26 4>; 73 reg = <0x00a2b000 0x1000>; [all …]
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/linux-6.12.1/arch/arm64/boot/dts/freescale/ |
D | fsl-ls1043a.dtsi | 37 #size-cells = <0>; 45 cpu0: cpu@0 { 48 reg = <0x0>; 49 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 58 reg = <0x1>; 59 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 68 reg = <0x2>; 69 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 78 reg = <0x3>; 79 clocks = <&clockgen QORIQ_CLK_CMUX 0>; [all …]
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D | fsl-ls1046a.dtsi | 38 #size-cells = <0>; 40 cpu0: cpu@0 { 43 reg = <0x0>; 44 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 53 reg = <0x1>; 54 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 63 reg = <0x2>; 64 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 73 reg = <0x3>; 74 clocks = <&clockgen QORIQ_CLK_CMUX 0>; [all …]
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/linux-6.12.1/drivers/media/dvb-frontends/drx39xyj/ |
D | drxj_map.h | 37 * Generated by: IDF:x 1.3.0 56 #define ATV_COMM_EXEC__A 0xC00000 58 #define ATV_COMM_EXEC__M 0x3 59 #define ATV_COMM_EXEC__PRE 0x0 60 #define ATV_COMM_EXEC_STOP 0x0 61 #define ATV_COMM_EXEC_ACTIVE 0x1 62 #define ATV_COMM_EXEC_HOLD 0x2 64 #define ATV_COMM_STATE__A 0xC00001 66 #define ATV_COMM_STATE__M 0xFFFF 67 #define ATV_COMM_STATE__PRE 0x0 [all …]
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