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/linux-6.12.1/arch/arm/boot/dts/realtek/
Drtd1195.dtsi6 /memreserve/ 0x00000000 0x0000a800; /* boot code */
7 /memreserve/ 0x0000a800 0x000f5800;
8 /memreserve/ 0x17fff000 0x00001000;
21 #size-cells = <0>;
23 cpu0: cpu@0 {
26 reg = <0x0>;
33 reg = <0x1>;
44 reg = <0x0000b000 0x1000>;
48 reg = <0x01b00000 0x400000>;
52 reg = <0x01ffe000 0x4000>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/arm/
Dvexpress-v2f-1xv7-ca53x2.dts20 arm,hbi = <0x247>;
21 arm,vexpress,site = <0xf>;
42 #size-cells = <0>;
44 cpu@0 {
47 reg = <0 0>;
54 reg = <0 1>;
67 reg = <0 0x80000000 0 0x80000000>; /* 2GB @ 2GB */
75 /* Chipselect 2 is physically at 0x18000000 */
79 reg = <0 0x18000000 0 0x00800000>;
87 #address-cells = <0>;
[all …]
Drtsm_ve-aemv8a.dts15 /memreserve/ 0x80000000 0x00010000;
39 #size-cells = <0>;
41 cpu@0 {
44 reg = <0x0 0x0>;
46 cpu-release-addr = <0x0 0x8000fff8>;
52 reg = <0x0 0x1>;
54 cpu-release-addr = <0x0 0x8000fff8>;
60 reg = <0x0 0x2>;
62 cpu-release-addr = <0x0 0x8000fff8>;
68 reg = <0x0 0x3>;
[all …]
Drtsm_ve-motherboard.dtsi13 #clock-cells = <0>;
20 #clock-cells = <0>;
27 #clock-cells = <0>;
49 #clock-cells = <0>;
55 arm,vexpress-sysreg,func = <5 0>;
60 arm,vexpress-sysreg,func = <7 0>;
65 arm,vexpress-sysreg,func = <8 0>;
70 arm,vexpress-sysreg,func = <9 0>;
75 arm,vexpress-sysreg,func = <11 0>;
83 ranges = <0 0x8000000 0 0x8000000 0x18000000>;
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/bus/
Dbrcm,bus-axi.txt26 reg = <0x18000000 0x1000>;
27 ranges = <0x00000000 0x18000000 0x00100000>;
31 interrupt-map-mask = <0x000fffff 0xffff>;
33 /* Ethernet Controller 0 */
34 <0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
37 <0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
39 /* PCIe Controller 0 */
40 <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
41 <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
42 <0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
[all …]
/linux-6.12.1/arch/sh/include/mach-common/mach/
Dsh7785lcr.h11 * 0x00000000 - 0x03ffffff(CS0) | NOR Flash | NOR Flash
12 * 0x04000000 - 0x05ffffff(CS1) | PLD | PLD
13 * 0x06000000 - 0x07ffffff(CS1) | I2C | I2C
14 * 0x08000000 - 0x0bffffff(CS2) | USB | DDR SDRAM
15 * 0x0c000000 - 0x0fffffff(CS3) | SD | DDR SDRAM
16 * 0x10000000 - 0x13ffffff(CS4) | SM107 | SM107
17 * 0x14000000 - 0x17ffffff(CS5) | reserved | USB
18 * 0x18000000 - 0x1bffffff(CS6) | reserved | SD
19 * 0x40000000 - 0x5fffffff | DDR SDRAM | (cannot use)
23 #define NOR_FLASH_ADDR 0x00000000
[all …]
/linux-6.12.1/arch/arm/boot/dts/samsung/
Ds3c6410-smdk6410.dts24 reg = <0x50000000 0x8000000>;
31 fin_pll: oscillator-0 {
35 #clock-cells = <0>;
42 #clock-cells = <0>;
49 reg = <0x18000000 0x8000000>;
54 reg = <0x18000000 0x10000>;
70 pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
77 pinctrl-0 = <&uart0_data>, <&uart0_fctl>;
83 pinctrl-0 = <&uart1_data>;
89 pinctrl-0 = <&uart2_data>;
[all …]
Ds3c6410-mini6410.dts24 reg = <0x50000000 0x10000000>;
31 fin_pll: oscillator-0 {
35 #clock-cells = <0>;
42 #clock-cells = <0>;
49 reg = <0x18000000 0x8000000>;
54 reg = <0x18000000 0x2>, <0x18000004 0x2>;
64 pinctrl-0 = <&gpio_keys>;
69 gpios = <&gpn 0 GPIO_ACTIVE_LOW>;
127 pinctrl-0 = <&gpio_leds>;
154 pwms = <&pwm 0 1000000 0>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/arm/
Dvexpress-v2p-ca5s.dts16 arm,hbi = <0x225>;
17 arm,vexpress,site = <0xf>;
36 #size-cells = <0>;
38 cpu@0 {
41 reg = <0>;
55 reg = <0x80000000 0x40000000>;
63 /* Chipselect 2 is physically at 0x18000000 */
67 reg = <0x18000000 0x00800000>;
74 reg = <0x2a110000 0x1000>;
75 interrupts = <0 85 4>;
[all …]
Dvexpress-v2p-ca15-tc1.dts16 arm,hbi = <0x237>;
17 arm,vexpress,site = <0xf>;
36 #size-cells = <0>;
38 cpu@0 {
41 reg = <0>;
53 reg = <0 0x80000000 0 0x40000000>;
61 /* Chipselect 2 is physically at 0x18000000 */
65 reg = <0 0x18000000 0 0x00800000>;
72 reg = <0 0x2b000000 0 0x1000>;
73 interrupts = <0 85 4>;
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/gpu/
Dnvidia,gk20a.txt46 reg = <0x0 0x57000000 0x0 0x01000000>,
47 <0x0 0x58000000 0x0 0x01000000>;
64 reg = <0x0 0x57000000 0x0 0x01000000>,
65 <0x0 0x58000000 0x0 0x01000000>;
82 reg = <0x0 0x17000000 0x0 0x1000000>,
83 <0x0 0x18000000 0x0 0x1000000>;
100 reg = <0x17000000 0x1000000>,
101 <0x18000000 0x1000000>;
/linux-6.12.1/drivers/net/wireless/realtek/rtw89/
Drtw8852a_rfk_table.c8 RTW89_DECL_RFK_WM(0x12a8, 0x00000001, 0x00000001),
9 RTW89_DECL_RFK_WM(0x12a8, 0x0000000e, 0x00000002),
10 RTW89_DECL_RFK_WM(0x32a8, 0x00000001, 0x00000001),
11 RTW89_DECL_RFK_WM(0x32a8, 0x0000000e, 0x00000002),
12 RTW89_DECL_RFK_WM(0x12bc, 0x000000f0, 0x00000005),
13 RTW89_DECL_RFK_WM(0x12bc, 0x00000f00, 0x00000005),
14 RTW89_DECL_RFK_WM(0x12bc, 0x000f0000, 0x00000005),
15 RTW89_DECL_RFK_WM(0x12bc, 0x0000f000, 0x00000005),
16 RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x00000033),
17 RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x00000033),
[all …]
/linux-6.12.1/drivers/net/wireless/broadcom/brcm80211/include/
Dsoc.h9 #define SI_ENUM_BASE_DEFAULT 0x18000000
12 #define SICF_BIST_EN 0x8000
13 #define SICF_PME_EN 0x4000
14 #define SICF_CORE_BITS 0x3ffc
15 #define SICF_FGC 0x0002
16 #define SICF_CLOCK_EN 0x0001
19 #define SISF_BIST_DONE 0x8000
20 #define SISF_BIST_ERROR 0x4000
21 #define SISF_GATED_CLK 0x2000
22 #define SISF_DMA64 0x1000
[all …]
/linux-6.12.1/arch/arm/boot/dts/broadcom/
Dbcm4708-buffalo-wzr-1166dhp.dts20 memory@0 {
22 reg = <0x00000000 0x08000000>,
23 <0x88000000 0x18000000>;
Dbcm53573.dtsi26 #size-cells = <0>;
28 cpu@0 {
31 reg = <0x0>;
37 ranges = <0x00000000 0x18310000 0x00008000>;
44 #address-cells = <0>;
46 reg = <0x1000 0x1000>,
47 <0x2000 0x0100>;
65 #clock-cells = <0>;
73 reg = <0x18000000 0x1000>;
74 ranges = <0x00000000 0x18000000 0x00100000>;
[all …]
Dbcm47094-phicomm-k3.dts16 memory@0 {
18 reg = <0x00000000 0x08000000>,
19 <0x88000000 0x18000000>;
47 partition@0 {
49 reg = <0x0000000 0x0080000>;
55 reg = <0x0080000 0x0100000>;
60 reg = <0x0180000 0x0280000>;
66 reg = <0x0400000 0x7C00000>;
/linux-6.12.1/Documentation/devicetree/bindings/sound/
Dmtk-btcvsd-snd.txt19 reg=<0 0x18000000 0 0x1000>,
20 <0 0x18080000 0 0x8000>;
23 mediatek,offset = <0xf00 0x800 0xfd0 0xfd4 0xfd8>;
/linux-6.12.1/arch/sh/include/cpu-sh4/cpu/
Daddrspace.h10 #define P0SEG 0x00000000
11 #define P1SEG 0x80000000
12 #define P2SEG 0xa0000000
13 #define P3SEG 0xc0000000
14 #define P4SEG 0xe0000000
18 #define P4SEG_IC_ADDR 0xf0000000
19 #define P4SEG_IC_DATA 0xf1000000
20 #define P4SEG_ITLB_ADDR 0xf2000000
21 #define P4SEG_ITLB_DATA 0xf3000000
22 #define P4SEG_OC_ADDR 0xf4000000
[all …]
/linux-6.12.1/arch/arm/mach-realtek/
Drtd1195.c23 rtd1195_memblock_remove(0x00000000, 0x0000a800); in rtd1195_reserve()
26 rtd1195_memblock_remove(0x18000000, 0x00070000); in rtd1195_reserve()
27 rtd1195_memblock_remove(0x18100000, 0x01000000); in rtd1195_reserve()
38 .l2c_aux_val = 0x0,
39 .l2c_aux_mask = ~0x0,
/linux-6.12.1/arch/arm64/boot/dts/ti/
Dk3-j721s2.dtsi29 #size-cells = <0>;
42 cpu0: cpu@0 {
44 reg = <0x000>;
47 i-cache-size = <0xc000>;
50 d-cache-size = <0x8000>;
58 reg = <0x001>;
61 i-cache-size = <0xc000>;
64 d-cache-size = <0x8000>;
75 cache-size = <0x100000>;
118 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
Dk3-j7200.dtsi25 #size-cells = <0>;
39 cpu0: cpu@0 {
41 reg = <0x000>;
44 i-cache-size = <0xc000>;
47 d-cache-size = <0x8000>;
55 reg = <0x001>;
58 i-cache-size = <0xc000>;
61 d-cache-size = <0x8000>;
72 cache-size = <0x100000>;
113 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
/linux-6.12.1/drivers/bcma/
Dscan.h5 #define BCMA_ADDR_BASE 0x18000000
6 #define BCMA_WRAP_BASE 0x18100000
8 #define SCAN_ER_VALID 0x00000001
9 #define SCAN_ER_TAGX 0x00000006 /* we have to ignore 0x8 bit when checking tag for SCAN_ER_TAG_ADD…
10 #define SCAN_ER_TAG 0x0000000E
11 #define SCAN_ER_TAG_CI 0x00000000
12 #define SCAN_ER_TAG_MP 0x00000002
13 #define SCAN_ER_TAG_ADDR 0x00000004
14 #define SCAN_ER_TAG_END 0x0000000E
15 #define SCAN_ER_BAD 0xFFFFFFFF
[all …]
/linux-6.12.1/arch/mips/boot/dts/loongson/
Drs780e-pch.dtsi8 ranges = <0 0x10000000 0 0x10000000 0 0x10000000
9 0 0x40000000 0 0x40000000 0 0x40000000
10 0xfd 0xfe000000 0xfd 0xfe000000 0 0x2000000 /* PCI Config Space */>;
18 reg = <0 0x1a000000 0 0x02000000>;
20 ranges = <0x01000000 0 0x00004000 0 0x18004000 0 0x0000c000>,
21 <0x02000000 0 0x40000000 0 0x40000000 0 0x40000000>;
28 ranges = <1 0 0 0x18000000 0x4000>;
32 reg = <1 0x70 0x8>;
39 reg = <1 0x800 0x100>;
/linux-6.12.1/Documentation/devicetree/bindings/mtd/
Dflctl-nand.txt26 reg = <0xe6a30000 0x100>;
27 interrupts = <0x0d80>;
35 system@0 {
37 reg = <0x0 0x8000000>;
42 reg = <0x8000000 0x10000000>;
47 reg = <0x18000000 0x8000000>;
/linux-6.12.1/arch/mips/boot/dts/realtek/
Drtl83xx.dtsi14 #address-cells = <0>;
23 ranges = <0x0 0x18000000 0x10000>;
27 reg = <0x2000 0x100>;
44 reg = <0x2100 0x100>;

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