/linux-6.12.1/drivers/net/wireless/ralink/rt2x00/ |
D | rt2800usb.c | 77 rt2x00_set_field32(®, MAC_SYS_CTRL_ENABLE_RX, 0); in rt2800usb_stop_queue() 82 rt2x00_set_field32(®, BCN_TIME_CFG_TSF_TICKING, 0); in rt2800usb_stop_queue() 83 rt2x00_set_field32(®, BCN_TIME_CFG_TBTT_ENABLE, 0); in rt2800usb_stop_queue() 84 rt2x00_set_field32(®, BCN_TIME_CFG_BEACON_GEN, 0); in rt2800usb_stop_queue() 187 * magic value USB_MODE_AUTORUN (0x11) to the device, thus the in rt2800usb_autorun_detect() 191 USB_VENDOR_REQUEST_IN, 0, in rt2800usb_autorun_detect() 196 if (ret < 0) in rt2800usb_autorun_detect() 199 if ((fw_mode & 0x00000003) == 2) in rt2800usb_autorun_detect() 202 return 0; in rt2800usb_autorun_detect() 224 offset = 0; in rt2800usb_write_firmware() [all …]
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D | rt73usb.c | 64 reg = 0; in rt73usb_bbp_write() 68 rt2x00_set_field32(®, PHY_CSR3_READ_CONTROL, 0); in rt73usb_bbp_write() 89 * doesn't become available in time, reg will be 0xffffffff in rt73usb_bbp_read() 90 * which means we return 0xff to the caller. in rt73usb_bbp_read() 93 reg = 0; in rt73usb_bbp_read() 122 reg = 0; in rt73usb_rf_write() 131 rt2x00_set_field32(®, PHY_CSR4_IF_SELECT, 0); in rt73usb_rf_write() 201 0, led->rt2x00dev->led_mcu_reg, in rt73usb_brightness_set() 210 0, led->rt2x00dev->led_mcu_reg, in rt73usb_brightness_set() 214 * The brightness is divided into 6 levels (0 - 5), in rt73usb_brightness_set() [all …]
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D | rt2800.h | 49 #define RF2820 0x0001 50 #define RF2850 0x0002 51 #define RF2720 0x0003 52 #define RF2750 0x0004 53 #define RF3020 0x0005 54 #define RF2020 0x0006 55 #define RF3021 0x0007 56 #define RF3022 0x0008 57 #define RF3052 0x0009 58 #define RF2853 0x000a [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/i2c/ |
D | i2c-mpc.yaml | 69 #size-cells = <0>; 71 reg = <0x1740 0x20>; 72 interrupts = <11 0x8>; 81 #size-cells = <0>; 83 reg = <0x3d00 0x40>; 84 interrupts = <2 15 0>; 93 #size-cells = <0>; 95 reg = <0x3100 0x100>;
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/linux-6.12.1/drivers/gpu/drm/radeon/ |
D | r600_reg.h | 31 #define R600_PCIE_PORT_INDEX 0x0038 32 #define R600_PCIE_PORT_DATA 0x003c 34 #define R600_RCU_INDEX 0x0100 35 #define R600_RCU_DATA 0x0104 37 #define R600_UVD_CTX_INDEX 0xf4a0 38 #define R600_UVD_CTX_DATA 0xf4a4 40 #define R600_MC_VM_FB_LOCATION 0x2180 41 #define R600_MC_FB_BASE_MASK 0x0000FFFF 42 #define R600_MC_FB_BASE_SHIFT 0 43 #define R600_MC_FB_TOP_MASK 0xFFFF0000 [all …]
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/linux-6.12.1/drivers/gpu/drm/etnaviv/ |
D | etnaviv_cmd_parser.c | 28 ST(0x1200, 1), 29 ST(0x1228, 1), 30 ST(0x1238, 1), 31 ST(0x1284, 1), 32 ST(0x128c, 1), 33 ST(0x1304, 1), 34 ST(0x1310, 1), 35 ST(0x1318, 1), 36 ST(0x12800, 4), 37 ST(0x128a0, 4), [all …]
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/linux-6.12.1/arch/powerpc/include/asm/ |
D | prom.h | 20 #define OF_DT_BEGIN_NODE 0x1 /* Start of node, full name */ 21 #define OF_DT_END_NODE 0x2 /* End node */ 22 #define OF_DT_PROP 0x3 /* Property: name off, size, 24 #define OF_DT_NOP 0x4 /* nop */ 25 #define OF_DT_END 0x9 27 #define OF_DT_VERSION 0x10 41 * ends when size is 0 102 #define OV_IGNORE 0x80 /* ignore this vector */ 103 #define OV_CESSATION_POLICY 0x40 /* halt if unsupported option present*/ 106 #define OV1_PPC_2_00 0x80 /* set if we support PowerPC 2.00 */ [all …]
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/linux-6.12.1/drivers/staging/rtl8712/ |
D | usb_intf.c | 41 {USB_DEVICE(0x0BDA, 0x8171)}, 42 {USB_DEVICE(0x0bda, 0x8173)}, 43 {USB_DEVICE(0x0bda, 0x8712)}, 44 {USB_DEVICE(0x0bda, 0x8713)}, 45 {USB_DEVICE(0x0bda, 0xC512)}, 47 {USB_DEVICE(0x07B8, 0x8188)}, 49 {USB_DEVICE(0x0B05, 0x1786)}, 50 {USB_DEVICE(0x0B05, 0x1791)}, /* 11n mode disable */ 52 {USB_DEVICE(0x050D, 0x945A)}, 54 {USB_DEVICE(0x050D, 0x11F1)}, [all …]
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/linux-6.12.1/arch/powerpc/boot/dts/ |
D | mpc5125twr.dts | 30 #size-cells = <0>; 32 PowerPC,5125@0 { 34 reg = <0>; 35 d-cache-line-size = <0x20>; // 32 bytes 36 i-cache-line-size = <0x20>; // 32 bytes 37 d-cache-size = <0x8000>; // L1, 32K 38 i-cache-size = <0x8000>; // L1, 32K 47 reg = <0x00000000 0x10000000>; // 256MB at 0 52 reg = <0x30000000 0x08000>; // 32K at 0x30000000 57 #size-cells = <0>; [all …]
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D | mpc5121.dtsi | 26 #size-cells = <0>; 28 PowerPC,5121@0 { 30 reg = <0>; 31 d-cache-line-size = <0x20>; /* 32 bytes */ 32 i-cache-line-size = <0x20>; /* 32 bytes */ 33 d-cache-size = <0x8000>; /* L1, 32K */ 34 i-cache-size = <0x8000>; /* L1, 32K */ 43 reg = <0x00000000 0x10000000>; /* 256MB at 0 */ 48 reg = <0x20000000 0x4000>; 49 interrupts = <66 0x8>; [all …]
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/linux-6.12.1/include/video/ |
D | aty128.h | 13 #define CLOCK_CNTL_INDEX 0x0008 14 #define CLOCK_CNTL_DATA 0x000c 15 #define BIOS_0_SCRATCH 0x0010 16 #define BUS_CNTL 0x0030 17 #define BUS_CNTL1 0x0034 18 #define GEN_INT_CNTL 0x0040 19 #define CRTC_GEN_CNTL 0x0050 20 #define CRTC_EXT_CNTL 0x0054 21 #define DAC_CNTL 0x0058 22 #define I2C_CNTL_1 0x0094 [all …]
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D | radeon.h | 6 #define RADEON_REGSIZE 0x4000 9 #define MM_INDEX 0x0000 10 #define MM_DATA 0x0004 11 #define BUS_CNTL 0x0030 12 #define HI_STAT 0x004C 13 #define BUS_CNTL1 0x0034 14 #define I2C_CNTL_1 0x0094 15 #define CNFG_CNTL 0x00E0 16 #define CNFG_MEMSIZE 0x00F8 17 #define CNFG_APER_0_BASE 0x0100 [all …]
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/linux-6.12.1/arch/alpha/include/asm/ |
D | core_mcpcia.h | 58 * 00 00 Byte 1110 0x000 59 * 01 00 Byte 1101 0x020 60 * 10 00 Byte 1011 0x040 61 * 11 00 Byte 0111 0x060 63 * 00 01 Word 1100 0x008 64 * 01 01 Word 1001 0x028 <= Not supported in this code. 65 * 10 01 Word 0011 0x048 67 * 00 10 Tribyte 1000 0x010 68 * 01 10 Tribyte 0001 0x030 70 * 10 11 Longword 0000 0x058 [all …]
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/linux-6.12.1/drivers/net/wireless/mediatek/mt7601u/ |
D | regs.h | 12 #define MT_ASIC_VERSION 0x0000 14 #define MT76XX_REV_E3 0x22 15 #define MT76XX_REV_E4 0x33 17 #define MT_CMB_CTRL 0x0020 21 #define MT_EFUSE_CTRL 0x0024 22 #define MT_EFUSE_CTRL_AOUT GENMASK(5, 0) 30 #define MT_EFUSE_DATA_BASE 0x0028 33 #define MT_COEXCFG0 0x0040 34 #define MT_COEXCFG0_COEX_EN BIT(0) 36 #define MT_WLAN_FUN_CTRL 0x0080 [all …]
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/linux-6.12.1/drivers/net/wireless/mediatek/mt76/ |
D | mt76x02_regs.h | 9 #define MT_ASIC_VERSION 0x0000 11 #define MT76XX_REV_E3 0x22 12 #define MT76XX_REV_E4 0x33 14 #define MT_CMB_CTRL 0x0020 18 #define MT_EFUSE_CTRL 0x0024 19 #define MT_EFUSE_CTRL_AOUT GENMASK(5, 0) 27 #define MT_EFUSE_DATA_BASE 0x0028 30 #define MT_COEXCFG0 0x0040 31 #define MT_COEXCFG0_COEX_EN BIT(0) 33 #define MT_WLAN_FUN_CTRL 0x0080 [all …]
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/linux-6.12.1/drivers/gpu/host1x/ |
D | dev.c | 90 .sync_offset = 0x3000, 94 .num_sid_entries = 0, 105 .sync_offset = 0x3000, 109 .num_sid_entries = 0, 120 .sync_offset = 0x2100, 124 .num_sid_entries = 0, 135 .sync_offset = 0x2100, 139 .num_sid_entries = 0, 147 .base = 0x1af0, 148 .offset = 0x30, [all …]
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/linux-6.12.1/drivers/ata/ |
D | sata_rcar.c | 22 #define ATAPI_CONTROL1_REG 0x180 23 #define ATAPI_STATUS_REG 0x184 24 #define ATAPI_INT_ENABLE_REG 0x188 25 #define ATAPI_DTB_ADR_REG 0x198 26 #define ATAPI_DMA_START_ADR_REG 0x19C 27 #define ATAPI_DMA_TRANS_CNT_REG 0x1A0 28 #define ATAPI_CONTROL2_REG 0x1A4 29 #define ATAPI_SIG_ST_REG 0x1B0 30 #define ATAPI_BYTE_SWAP_REG 0x1BC 39 #define ATAPI_CONTROL1_START BIT(0) [all …]
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/linux-6.12.1/drivers/net/wireless/intersil/p54/ |
D | p54usb.c | 45 {USB_DEVICE(0x0411, 0x0050)}, /* Buffalo WLI2-USB2-G54 */ 46 {USB_DEVICE(0x045e, 0x00c2)}, /* Microsoft MN-710 */ 47 {USB_DEVICE(0x0506, 0x0a11)}, /* 3COM 3CRWE254G72 */ 48 {USB_DEVICE(0x0675, 0x0530)}, /* DrayTek Vigor 530 */ 49 {USB_DEVICE(0x06b9, 0x0120)}, /* Thomson SpeedTouch 120g */ 50 {USB_DEVICE(0x0707, 0xee06)}, /* SMC 2862W-G */ 51 {USB_DEVICE(0x07aa, 0x001c)}, /* Corega CG-WLUSB2GT */ 52 {USB_DEVICE(0x083a, 0x4501)}, /* Accton 802.11g WN4501 USB */ 53 {USB_DEVICE(0x083a, 0x4502)}, /* Siemens Gigaset USB Adapter */ 54 {USB_DEVICE(0x083a, 0x5501)}, /* Phillips CPWUA054 */ [all …]
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/linux-6.12.1/sound/pci/ |
D | maestro3.c | 45 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 48 static bool external_amp[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1}; 49 static int amp_gpio[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1}; 72 #define PCI_LEGACY_AUDIO_CTRL 0x40 73 #define SOUND_BLASTER_ENABLE 0x00000001 74 #define FM_SYNTHESIS_ENABLE 0x00000002 75 #define GAME_PORT_ENABLE 0x00000004 76 #define MPU401_IO_ENABLE 0x00000008 77 #define MPU401_IRQ_ENABLE 0x00000010 78 #define ALIAS_10BIT_IO 0x00000020 [all …]
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/linux-6.12.1/include/linux/mfd/mt6357/ |
D | registers.h | 10 #define MT6357_TOP0_ID 0x0 11 #define MT6357_TOP0_REV0 0x2 12 #define MT6357_TOP0_DSN_DBI 0x4 13 #define MT6357_TOP0_DSN_DXI 0x6 14 #define MT6357_HWCID 0x8 15 #define MT6357_SWCID 0xa 16 #define MT6357_PONSTS 0xc 17 #define MT6357_POFFSTS 0xe 18 #define MT6357_PSTSCTL 0x10 19 #define MT6357_PG_DEB_STS0 0x12 [all …]
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/linux-6.12.1/drivers/soundwire/ |
D | qcom.c | 25 #define SWRM_COMP_SW_RESET 0x008 26 #define SWRM_COMP_STATUS 0x014 27 #define SWRM_LINK_MANAGER_EE 0x018 29 #define SWRM_FRM_GEN_ENABLED BIT(0) 30 #define SWRM_VERSION_1_3_0 0x01030000 31 #define SWRM_VERSION_1_5_1 0x01050001 32 #define SWRM_VERSION_1_7_0 0x01070000 33 #define SWRM_VERSION_2_0_0 0x02000000 34 #define SWRM_COMP_HW_VERSION 0x00 35 #define SWRM_COMP_CFG_ADDR 0x04 [all …]
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/linux-6.12.1/drivers/net/wireless/zydas/zd1211rw/ |
D | zd_usb.c | 28 { USB_DEVICE(0x0105, 0x145f), .driver_info = DEVICE_ZD1211 }, 29 { USB_DEVICE(0x0586, 0x3401), .driver_info = DEVICE_ZD1211 }, 30 { USB_DEVICE(0x0586, 0x3402), .driver_info = DEVICE_ZD1211 }, 31 { USB_DEVICE(0x0586, 0x3407), .driver_info = DEVICE_ZD1211 }, 32 { USB_DEVICE(0x0586, 0x3409), .driver_info = DEVICE_ZD1211 }, 33 { USB_DEVICE(0x079b, 0x004a), .driver_info = DEVICE_ZD1211 }, 34 { USB_DEVICE(0x07b8, 0x6001), .driver_info = DEVICE_ZD1211 }, 35 { USB_DEVICE(0x0ace, 0x1211), .driver_info = DEVICE_ZD1211 }, 36 { USB_DEVICE(0x0ace, 0xa211), .driver_info = DEVICE_ZD1211 }, 37 { USB_DEVICE(0x0b05, 0x170c), .driver_info = DEVICE_ZD1211 }, [all …]
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/linux-6.12.1/drivers/clk/qcom/ |
D | gcc-msm8974.c | 36 .l_reg = 0x0004, 37 .m_reg = 0x0008, 38 .n_reg = 0x000c, 39 .config_reg = 0x0014, 40 .mode_reg = 0x0000, 41 .status_reg = 0x001c, 54 .enable_reg = 0x1480, 55 .enable_mask = BIT(0), 67 .l_reg = 0x1dc4, 68 .m_reg = 0x1dc8, [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/ |
D | dce_11_0_d.h | 27 #define mmPIPE0_PG_CONFIG 0x2c0 28 #define mmPIPE0_PG_ENABLE 0x2c1 29 #define mmPIPE0_PG_STATUS 0x2c2 30 #define mmPIPE1_PG_CONFIG 0x2c3 31 #define mmPIPE1_PG_ENABLE 0x2c4 32 #define mmPIPE1_PG_STATUS 0x2c5 33 #define mmPIPE2_PG_CONFIG 0x2c6 34 #define mmPIPE2_PG_ENABLE 0x2c7 35 #define mmPIPE2_PG_STATUS 0x2c8 36 #define mmDCFEV0_PG_CONFIG 0x2db [all …]
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D | dce_10_0_d.h | 27 #define mmPIPE0_PG_CONFIG 0x2c0 28 #define mmPIPE0_PG_ENABLE 0x2c1 29 #define mmPIPE0_PG_STATUS 0x2c2 30 #define mmPIPE1_PG_CONFIG 0x2c3 31 #define mmPIPE1_PG_ENABLE 0x2c4 32 #define mmPIPE1_PG_STATUS 0x2c5 33 #define mmPIPE2_PG_CONFIG 0x2c6 34 #define mmPIPE2_PG_ENABLE 0x2c7 35 #define mmPIPE2_PG_STATUS 0x2c8 36 #define mmPIPE3_PG_CONFIG 0x2c9 [all …]
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