/linux-6.12.1/drivers/media/pci/cx18/ |
D | cx18-av-firmware.c | 13 #define CX18_AUDIO_ENABLE 0xc72014 14 #define CX18_AI1_MUX_MASK 0x30 15 #define CX18_AI1_MUX_I2S1 0x00 16 #define CX18_AI1_MUX_I2S2 0x10 17 #define CX18_AI1_MUX_843_I2S 0x20 18 #define CX18_AI1_MUX_INVALID 0x30 25 int ret = 0; in cx18_av_verifyfw() 34 dl_control &= 0x00ffffff; in cx18_av_verifyfw() 35 dl_control |= 0x0f000000; in cx18_av_verifyfw() 38 } while ((dl_control & 0xff000000) != 0x0f000000); in cx18_av_verifyfw() [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/arm/mediatek/ |
D | mediatek,g3dsys.txt | 27 reg = <0 0x13000000 0 0x200>;
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/linux-6.12.1/Documentation/devicetree/bindings/clock/ |
D | mediatek,mt6795-clock.yaml | 51 reg = <0 0x13000000 0 0x1000>; 57 reg = <0 0x16000000 0 0x1000>; 63 reg = <0 0x18000000 0 0x1000>;
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/linux-6.12.1/Documentation/devicetree/bindings/pci/ |
D | nvidia,tegra20-pcie.txt | 27 - cell 0 specifies the bus and device numbers of the root port: 30 - cell 1 denotes the upper 32 address bits and should be 0 45 - 0x81000000: I/O memory region 46 - 0x82000000: non-prefetchable memory region 47 - 0xc2000000: prefetchable memory region 73 - pinctrl-0: phandle for the default/active state of pin configurations. 104 - If lanes 0 to 3 are used: 150 - Root port 0 uses 4 lanes, root port 1 is unused. 158 "pcie-N": where N ranges from 0 to the value specified in nvidia,num-lanes. 171 reg = <0x80003000 0x00000800 /* PADS registers */ [all …]
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/linux-6.12.1/arch/arm/boot/dts/arm/ |
D | integrator.dtsi | 12 reg = <0x0 0x0>; 17 reg = <0x10000000 0x200>; 18 ranges = <0x0 0x10000000 0x200>; 23 led@c,0 { 25 reg = <0x0c 0x04>; 26 offset = <0x0c>; 27 mask = <0x01>; 36 reg = <0x12000000 0x100>; 40 reg = <0x13000000 0x100>; 46 reg = <0x13000100 0x100>; [all …]
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/linux-6.12.1/arch/arm/mach-versatile/ |
D | integrator-hardware.h | 14 #define IO_BASE 0xF0000000 // VA of IO 15 #define IO_SIZE 0x0B000000 // How much? 19 #define IO_ADDRESS(x) (((x) & 0x000fffff) | (((x) >> 4) & 0x0ff00000) | IO_BASE) 25 #define INTEGRATOR_BOOT_ROM_LO 0x00000000 26 #define INTEGRATOR_BOOT_ROM_HI 0x20000000 40 #define INTEGRATOR_SSRAM_BASE 0x00000000 41 #define INTEGRATOR_SSRAM_ALIAS_BASE 0x10800000 44 #define INTEGRATOR_FLASH_BASE 0x24000000 47 #define INTEGRATOR_MBRD_SSRAM_BASE 0x28000000 53 #define INTEGRATOR_SDRAM_BASE 0x00040000 [all …]
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/linux-6.12.1/arch/arm/boot/dts/nxp/imx/ |
D | imx1.dtsi | 38 reg = <0x00223000 0x1000>; 42 #size-cells = <0>; 45 cpu@0 { 47 reg = <0>; 59 #clock-cells = <0>; 75 reg = <0x00200000 0x10000>; 80 reg = <0x00202000 0x1000>; 89 reg = <0x00203000 0x1000>; 98 reg = <0x00205000 0x1000>; 109 reg = <0x00206000 0x1000>; [all …]
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/linux-6.12.1/arch/arm/boot/dts/mediatek/ |
D | mt7623n.dtsi | 22 reg = <0 0x13000000 0 0x200>; 29 reg = <0 0x13040000 0 0x30000>; 55 reg = <0 0x14000000 0 0x1000>; 62 reg = <0 0x14010000 0 0x1000>; 64 mediatek,larb-id = <0>; 74 reg = <0 0x16010000 0 0x1000>; 86 reg = <0 0x15001000 0 0x1000>; 99 reg = <0 0x15000000 0 0x1000>; 106 reg = <0 0x10205000 0 0x1000>; 117 reg = <0 0x15004000 0 0x1000>; [all …]
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/linux-6.12.1/fs/freevxfs/ |
D | vxfs.h | 20 #define VXFS_SUPER_MAGIC 0xa501FCF5 176 * File modes. File types above 0xf000 are vxfs internal only, they should 181 VXFS_ISUID = 0x00000800, /* setuid */ 182 VXFS_ISGID = 0x00000400, /* setgid */ 183 VXFS_ISVTX = 0x00000200, /* sticky bit */ 184 VXFS_IREAD = 0x00000100, /* read */ 185 VXFS_IWRITE = 0x00000080, /* write */ 186 VXFS_IEXEC = 0x00000040, /* exec */ 188 VXFS_IFIFO = 0x00001000, /* Named pipe */ 189 VXFS_IFCHR = 0x00002000, /* Character device */ [all …]
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/linux-6.12.1/drivers/gpu/drm/msm/adreno/ |
D | a5xx_power.c | 18 #define AGC_MSG_STATE (AGC_MSG_BASE + 0) 24 #define AGC_INIT_MSG_VALUE 0xBABEFACE 42 { 0xB9A1, 0x00010303 }, 43 { 0xB9A2, 0x13000000 }, 44 { 0xB9A3, 0x00460020 }, 45 { 0xB9A4, 0x10000000 }, 46 { 0xB9A5, 0x040A1707 }, 47 { 0xB9A6, 0x00010000 }, 48 { 0xB9A7, 0x0E000904 }, 49 { 0xB9A8, 0x10000000 }, [all …]
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/linux-6.12.1/drivers/net/wireless/realtek/rtl8xxxu/ |
D | 8710b.c | 18 {0x421, 0x0F}, {0x428, 0x0A}, {0x429, 0x10}, {0x430, 0x00}, 19 {0x431, 0x00}, {0x432, 0x00}, {0x433, 0x01}, {0x434, 0x04}, 20 {0x435, 0x05}, {0x436, 0x07}, {0x437, 0x08}, {0x43C, 0x04}, 21 {0x43D, 0x05}, {0x43E, 0x07}, {0x43F, 0x08}, {0x440, 0x5D}, 22 {0x441, 0x01}, {0x442, 0x00}, {0x444, 0x10}, {0x445, 0x00}, 23 {0x446, 0x00}, {0x447, 0x00}, {0x448, 0x00}, {0x449, 0xF0}, 24 {0x44A, 0x0F}, {0x44B, 0x3E}, {0x44C, 0x10}, {0x44D, 0x00}, 25 {0x44E, 0x00}, {0x44F, 0x00}, {0x450, 0x00}, {0x451, 0xF0}, 26 {0x452, 0x0F}, {0x453, 0x00}, {0x456, 0x5E}, {0x460, 0x66}, 27 {0x461, 0x66}, {0x4C8, 0xFF}, {0x4C9, 0x08}, {0x4CC, 0xFF}, [all …]
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/linux-6.12.1/arch/arm64/include/asm/ |
D | insn.h | 18 AARCH64_INSN_HINT_NOP = 0x0 << 5, 19 AARCH64_INSN_HINT_YIELD = 0x1 << 5, 20 AARCH64_INSN_HINT_WFE = 0x2 << 5, 21 AARCH64_INSN_HINT_WFI = 0x3 << 5, 22 AARCH64_INSN_HINT_SEV = 0x4 << 5, 23 AARCH64_INSN_HINT_SEVL = 0x5 << 5, 25 AARCH64_INSN_HINT_XPACLRI = 0x07 << 5, 26 AARCH64_INSN_HINT_PACIA_1716 = 0x08 << 5, 27 AARCH64_INSN_HINT_PACIB_1716 = 0x0A << 5, 28 AARCH64_INSN_HINT_AUTIA_1716 = 0x0C << 5, [all …]
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/linux-6.12.1/arch/arm64/boot/dts/renesas/ |
D | r9a09g057.dtsi | 18 #clock-cells = <0>; 20 clock-frequency = <0>; 25 #size-cells = <0>; 27 cpu0: cpu@0 { 29 reg = <0>; 37 reg = <0x100>; 45 reg = <0x200>; 53 reg = <0x300>; 59 L3_CA55: cache-controller-0 { 62 cache-size = <0x100000>; [all …]
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/linux-6.12.1/arch/arm/boot/dts/nvidia/ |
D | tegra124.dtsi | 21 reg = <0x0 0x80000000 0x0 0x0>; 27 reg = <0x0 0x01003000 0x0 0x00000800>, /* PADS registers */ 28 <0x0 0x01003800 0x0 0x00000800>, /* AFI registers */ 29 <0x0 0x02000000 0x0 0x10000000>; /* configuration space */ 36 interrupt-map-mask = <0 0 0 0>; 37 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 39 bus-range = <0x00 0xff>; 43 ranges = <0x02000000 0 0x01000000 0x0 0x01000000 0 0x00001000>, /* port 0 configuration space */ 44 <0x02000000 0 0x01001000 0x0 0x01001000 0 0x00001000>, /* port 1 configuration space */ 45 <0x01000000 0 0x0 0x0 0x12000000 0 0x00010000>, /* downstream I/O (64 KiB) */ [all …]
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/linux-6.12.1/arch/arm64/boot/dts/nvidia/ |
D | tegra132.dtsi | 22 reg = <0x0 0x01003000 0x0 0x00000800>, /* PADS registers */ 23 <0x0 0x01003800 0x0 0x00000800>, /* AFI registers */ 24 <0x0 0x02000000 0x0 0x10000000>; /* configuration space */ 31 interrupt-map-mask = <0 0 0 0>; 32 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 34 bus-range = <0x00 0xff>; 38 ranges = <0x02000000 0 0x01000000 0x0 0x01000000 0 0x00001000>, /* port 0 configuration space */ 39 <0x02000000 0 0x01001000 0x0 0x01001000 0 0x00001000>, /* port 1 configuration space */ 40 <0x01000000 0 0x0 0x0 0x12000000 0 0x00010000>, /* downstream I/O (64 KiB) */ 41 <0x02000000 0 0x13000000 0x0 0x13000000 0 0x0d000000>, /* non-prefetchable memory (208 MiB) */ [all …]
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D | tegra210.dtsi | 21 reg = <0x0 0x01003000 0x0 0x00000800>, /* PADS registers */ 22 <0x0 0x01003800 0x0 0x00000800>, /* AFI registers */ 23 <0x0 0x02000000 0x0 0x10000000>; /* configuration space */ 30 interrupt-map-mask = <0 0 0 0>; 31 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 33 bus-range = <0x00 0xff>; 37 ranges = <0x02000000 0 0x01000000 0x0 0x01000000 0 0x00001000>, /* port 0 configuration space */ 38 <0x02000000 0 0x01001000 0x0 0x01001000 0 0x00001000>, /* port 1 configuration space */ 39 <0x01000000 0 0x0 0x0 0x12000000 0 0x00010000>, /* downstream I/O (64 KiB) */ 40 <0x02000000 0 0x13000000 0x0 0x13000000 0 0x0d000000>, /* non-prefetchable memory (208 MiB) */ [all …]
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/linux-6.12.1/drivers/net/wireless/realtek/rtw88/ |
D | rtw8723d_table.c | 10 0x020, 0x00000013, 11 0x02F, 0x00000010, 12 0x077, 0x00000007, 13 0x421, 0x0000000F, 14 0x428, 0x0000000A, 15 0x429, 0x00000010, 16 0x430, 0x00000000, 17 0x431, 0x00000000, 18 0x432, 0x00000000, 19 0x433, 0x00000001, [all …]
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/linux-6.12.1/drivers/net/usb/ |
D | lan78xx.h | 9 #define USB_VENDOR_REQUEST_WRITE_REGISTER 0xA0 10 #define USB_VENDOR_REQUEST_READ_REGISTER 0xA1 11 #define USB_VENDOR_REQUEST_GET_STATS 0xA2 32 #define TX_CMD_A_IGE_ (0x20000000) 33 #define TX_CMD_A_ICE_ (0x10000000) 34 #define TX_CMD_A_LSO_ (0x08000000) 35 #define TX_CMD_A_IPE_ (0x04000000) 36 #define TX_CMD_A_TPE_ (0x02000000) 37 #define TX_CMD_A_IVTG_ (0x01000000) 38 #define TX_CMD_A_RVTG_ (0x00800000) [all …]
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/linux-6.12.1/arch/hexagon/kernel/ |
D | vm_init_segtable.S | 16 * Start with mapping PA=0 to both VA=0x0 and VA=0xc000000 as 16MB large pages. 46 /* VA 0x00000000 */ 59 /* VA 0x40000000 */ 68 /* VA 0x80000000 */ 74 /*0xa8*/.word X,X,X,X 77 /*0xa9*/.word BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000) 79 /*0xa9*/.word X,X,X,X 81 /*0xaa*/.word X,X,X,X 82 /*0xab*/.word X,X,X,X 83 /*0xac*/.word X,X,X,X [all …]
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/linux-6.12.1/arch/arm64/boot/dts/exynos/ |
D | exynos850.dtsi | 52 #clock-cells = <0>; 57 #size-cells = <0>; 91 cpu0: cpu@0 { 94 reg = <0x0>; 102 reg = <0x1>; 108 reg = <0x2>; 114 reg = <0x3>; 120 reg = <0x100>; 128 reg = <0x101>; 134 reg = <0x102>; [all …]
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/linux-6.12.1/arch/arm/boot/dts/samsung/ |
D | exynos3250.dtsi | 199 #size-cells = <0>; 212 cpu0: cpu@0 { 215 reg = <0>; 259 xusbxti: clock-0 { 261 clock-frequency = <0>; 262 #clock-cells = <0>; 268 clock-frequency = <0>; 269 #clock-cells = <0>; 275 clock-frequency = <0>; 276 #clock-cells = <0>; [all …]
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D | exynos4.dtsi | 68 reg = <0x03810000 0x0c>; 79 reg = <0x03830000 0x100>; 88 samsung,idma-addr = <0x03000000>; 95 reg = <0x10000000 0x100>; 100 reg = <0x10500000 0x2000>; 105 reg = <0x12570000 0x14>; 110 reg = <0x10023c40 0x20>; 111 #power-domain-cells = <0>; 117 reg = <0x10023c60 0x20>; 118 #power-domain-cells = <0>; [all …]
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/linux-6.12.1/arch/mips/include/asm/mach-ath79/ |
D | ar71xx_regs.h | 19 #define AR71XX_APB_BASE 0x18000000 20 #define AR71XX_GE0_BASE 0x19000000 21 #define AR71XX_GE0_SIZE 0x10000 22 #define AR71XX_GE1_BASE 0x1a000000 23 #define AR71XX_GE1_SIZE 0x10000 24 #define AR71XX_EHCI_BASE 0x1b000000 25 #define AR71XX_EHCI_SIZE 0x1000 26 #define AR71XX_OHCI_BASE 0x1c000000 27 #define AR71XX_OHCI_SIZE 0x1000 28 #define AR71XX_SPI_BASE 0x1f000000 [all …]
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/linux-6.12.1/crypto/ |
D | aes_generic.c | 67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6, 68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591, 69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56, 70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec, 71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa, 72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb, 73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45, 74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b, 75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c, 76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83, [all …]
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/linux-6.12.1/arch/arm64/boot/dts/mediatek/ |
D | mt2712e.dtsi | 22 cluster0_opp: opp-table-0 { 66 #size-cells = <0>; 85 cpu0: cpu@0 { 88 reg = <0x000>; 100 reg = <0x001>; 113 reg = <0x200>; 126 CPU_SLEEP_0: cpu-sleep-0 { 132 arm,psci-suspend-param = <0x0010000>; 135 CLUSTER_SLEEP_0: cluster-sleep-0 { 141 arm,psci-suspend-param = <0x1010000>; [all …]
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