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/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dmediatek,mt7988-xfi-pll.yaml44 reg = <0 0x11f40000 0 0x1000>;
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt7988a.dtsi15 #size-cells = <0>;
17 cpu@0 {
19 reg = <0x0>;
26 reg = <0x1>;
33 reg = <0x2>;
40 reg = <0x3>;
49 #clock-cells = <0>;
72 reg = <0 0x0c000000 0 0x40000>, /* GICD */
73 <0 0x0c080000 0 0x200000>, /* GICR */
74 <0 0x0c400000 0 0x2000>, /* GICC */
[all …]
Dmt8183.dtsi293 #size-cells = <0>;
327 cpu0: cpu@0 {
330 reg = <0x000>;
353 reg = <0x001>;
376 reg = <0x002>;
399 reg = <0x003>;
422 reg = <0x100>;
445 reg = <0x101>;
468 reg = <0x102>;
491 reg = <0x103>;
[all …]
Dmt8195.dtsi51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0x000>;
58 performance-domains = <&performance 0>;
75 reg = <0x100>;
77 performance-domains = <&performance 0>;
94 reg = <0x200>;
96 performance-domains = <&performance 0>;
113 reg = <0x300>;
115 performance-domains = <&performance 0>;
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Dmediatek,mt8195-pinctrl.yaml240 reg = <0x10005000 0x1000>,
241 <0x11d10000 0x1000>,
242 <0x11d30000 0x1000>,
243 <0x11d40000 0x1000>,
244 <0x11e20000 0x1000>,
245 <0x11eb0000 0x1000>,
246 <0x11f40000 0x1000>,
247 <0x1000b000 0x1000>;
253 gpio-ranges = <&pio 0 0 144>;
255 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH 0>;
/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/
Dgpcgm107.fuc5.h3 /* 0x0000: gpc_mmio_list_head */
4 0x0000006c,
5 /* 0x0004: gpc_mmio_list_tail */
6 /* 0x0004: tpc_mmio_list_head */
7 0x0000006c,
8 /* 0x0008: tpc_mmio_list_tail */
9 /* 0x0008: unk_mmio_list_head */
10 0x0000006c,
11 /* 0x000c: unk_mmio_list_tail */
12 0x0000006c,
[all …]
/linux-6.12.1/drivers/pinctrl/mediatek/
Dpinctrl-mt8195.c13 * iocfg[0]:0x10005000, iocfg[1]:0x11d10000, iocfg[2]:0x11d30000,
14 * iocfg[3]:0x11d40000, iocfg[4]:0x11e20000, iocfg[5]:0x11eb0000,
15 * iocfg[6]:0x11f40000.
21 32, 0)
28 PIN_FIELD(0, 144, 0x300, 0x10, 0, 4),
32 PIN_FIELD(0, 144, 0x0, 0x10, 0, 1),
36 PIN_FIELD(0, 144, 0x200, 0x10, 0, 1),
40 PIN_FIELD(0, 144, 0x100, 0x10, 0, 1),
44 PIN_FIELD_BASE(0, 0, 4, 0x040, 0x10, 0, 1),
45 PIN_FIELD_BASE(1, 1, 4, 0x040, 0x10, 1, 1),
[all …]