Searched +full:0 +full:x10420000 (Results 1 – 3 of 3) sorted by relevance
/linux-6.12.1/Documentation/devicetree/bindings/clock/ |
D | renesas,rzv2h-cpg.yaml | 45 calculation is (1 * 16 + 3) = 0x13. 49 const: 0 56 for SYS_0_PRESETN, the calculation is (3 * 16 + 0) = 0x30. 74 reg = <0x10420000 0x10000>; 78 #power-domain-cells = <0>;
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/linux-6.12.1/arch/arm64/boot/dts/renesas/ |
D | r9a09g057.dtsi | 18 #clock-cells = <0>; 20 clock-frequency = <0>; 25 #size-cells = <0>; 27 cpu0: cpu@0 { 29 reg = <0>; 37 reg = <0x100>; 45 reg = <0x200>; 53 reg = <0x300>; 59 L3_CA55: cache-controller-0 { 62 cache-size = <0x100000>; [all …]
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/linux-6.12.1/drivers/net/ethernet/microchip/sparx5/ |
D | sparx5_main.c | 55 { TARGET_CPU, 0, 0 }, /* 0x600000000 */ 56 { TARGET_FDMA, 0x80000, 0 }, /* 0x600080000 */ 57 { TARGET_PCEP, 0x400000, 0 }, /* 0x600400000 */ 58 { TARGET_DEV2G5, 0x10004000, 1 }, /* 0x610004000 */ 59 { TARGET_DEV5G, 0x10008000, 1 }, /* 0x610008000 */ 60 { TARGET_PCS5G_BR, 0x1000c000, 1 }, /* 0x61000c000 */ 61 { TARGET_DEV2G5 + 1, 0x10010000, 1 }, /* 0x610010000 */ 62 { TARGET_DEV5G + 1, 0x10014000, 1 }, /* 0x610014000 */ 63 { TARGET_PCS5G_BR + 1, 0x10018000, 1 }, /* 0x610018000 */ 64 { TARGET_DEV2G5 + 2, 0x1001c000, 1 }, /* 0x61001c000 */ [all …]
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