Searched +full:0 +full:x10210000 (Results 1 – 9 of 9) sorted by relevance
20 const: 054 reg = <0x10210000 0x10000>;55 #phy-cells = <0>;56 starfive,sys-syscon = <&sys_syscon 0x18>;57 starfive,stg-syscon = <&stg_syscon 0x148 0x1f4>;
17 #define NOMADIK_FSMC_BASE 0x10100000 /* FSMC registers */18 #define NOMADIK_SDRAMC_BASE 0x10110000 /* SDRAM Controller */19 #define NOMADIK_CLCDC_BASE 0x10120000 /* CLCD Controller */20 #define NOMADIK_MDIF_BASE 0x10120000 /* MDIF */21 #define NOMADIK_DMA0_BASE 0x10130000 /* DMA0 Controller */22 #define NOMADIK_IC_BASE 0x10140000 /* Vectored Irq Controller */23 #define NOMADIK_DMA1_BASE 0x10150000 /* DMA1 Controller */24 #define NOMADIK_USB_BASE 0x10170000 /* USB-OTG conf reg base */25 #define NOMADIK_CRYP_BASE 0x10180000 /* Crypto processor */26 #define NOMADIK_SHA1_BASE 0x10190000 /* SHA-1 Processor */[all …]
17 #define RTL8712_IOBASE_TXPKT 0x10200000 /*IOBASE_TXPKT*/18 #define RTL8712_IOBASE_RXPKT 0x10210000 /*IOBASE_RXPKT*/19 #define RTL8712_IOBASE_RXCMD 0x10220000 /*IOBASE_RXCMD*/20 #define RTL8712_IOBASE_TXSTATUS 0x10230000 /*IOBASE_TXSTATUS*/21 #define RTL8712_IOBASE_RXSTATUS 0x10240000 /*IOBASE_RXSTATUS*/22 #define RTL8712_IOBASE_IOREG 0x10250000 /*IOBASE_IOREG ADDR*/23 #define RTL8712_IOBASE_SCHEDULER 0x10260000 /*IOBASE_SCHEDULE*/25 #define RTL8712_IOBASE_TRXDMA 0x10270000 /*IOBASE_TRXDMA*/26 #define RTL8712_IOBASE_TXLLT 0x10280000 /*IOBASE_TXLLT*/27 #define RTL8712_IOBASE_WMAC 0x10290000 /*IOBASE_WMAC*/[all …]
24 #size-cells = <0>;27 cpu0: cpu@0 {30 reg = <0x0>;38 reg = <0x1>;51 clk20m: oscillator-0 {53 #clock-cells = <0>;60 #clock-cells = <0>;83 reg = <0x10000000 0x1000>;89 reg = <0x10002000 0x1000>;97 reg = <0x10006000 0x1000>;[all …]
14 reg = <0x00000000 0x04000000>,15 <0x08000000 0x04000000>;20 reg = <0x10210000 0x1000>;37 reg = <0x101e2000 0x1000>;46 reg = <0x101e3000 0x1000>;55 reg = <0x101e4000 0x80>;62 gpio-bank = <0>;63 gpio-ranges = <&pinctrl 0 0 32>;69 reg = <0x101e5000 0x80>;77 gpio-ranges = <&pinctrl 0 32 32>;[all …]
29 #size-cells = <0>;34 reg = <0xf00>;43 cpu_opp_table: opp-table-0 {85 #clock-cells = <0>;90 reg = <0x10080000 0x2000>;93 ranges = <0 0x10080000 0x2000>;98 reg = <0x10210000 0x100>;107 pinctrl-0 = <&uart2m0_xfer>;113 reg = <0x10220000 0x100>;122 pinctrl-0 = <&uart1_xfer>;[all …]
69 #size-cells = <0>;71 cpu0: cpu@0 {74 reg = <0x0 0x0>;89 reg = <0x0 0x1>;111 #clock-cells = <0>;116 #clock-cells = <0>;140 reg = <0 0x43000000 0 0x30000>;150 thermal-sensors = <&thermal 0>;216 reg = <0 0x10000000 0 0x1000>;223 reg = <0 0x10001000 0 0x250>;[all …]
20 #size-cells = <0>;22 S7_0: cpu@0 {24 reg = <0>;200 cpu_opp: opp-table-0 {260 #clock-cells = <0>;265 #clock-cells = <0>;271 #clock-cells = <0>;277 #clock-cells = <0>;283 #clock-cells = <0>;289 #clock-cells = <0>;[all …]
146 0x80000000 | 0xf0000000 | UART0147 0x80004000 | 0xf0004000 | UART1148 0x80008000 | 0xf0008000 | UART2149 0x8000c000 | 0xf000c000 | UART3150 0x80010000 | 0xf0010000 | UART4151 0x80014000 | 0xf0014000 | UART5152 0x80018000 | 0xf0018000 | UART6153 0x8001c000 | 0xf001c000 | UART7154 0x80020000 | 0xf0020000 | UART8155 0x80024000 | 0xf0024000 | UART9[all …]