Searched +full:0 +full:x10180000 (Results 1 – 8 of 8) sorted by relevance
33 port@0:56 reg = <0x10180000 0x8000>;65 #size-cells = <0>;66 hdmi_in: port@0 {67 reg = <0>;
17 #define NOMADIK_FSMC_BASE 0x10100000 /* FSMC registers */18 #define NOMADIK_SDRAMC_BASE 0x10110000 /* SDRAM Controller */19 #define NOMADIK_CLCDC_BASE 0x10120000 /* CLCD Controller */20 #define NOMADIK_MDIF_BASE 0x10120000 /* MDIF */21 #define NOMADIK_DMA0_BASE 0x10130000 /* DMA0 Controller */22 #define NOMADIK_IC_BASE 0x10140000 /* Vectored Irq Controller */23 #define NOMADIK_DMA1_BASE 0x10150000 /* DMA1 Controller */24 #define NOMADIK_USB_BASE 0x10170000 /* USB-OTG conf reg base */25 #define NOMADIK_CRYP_BASE 0x10180000 /* Crypto processor */26 #define NOMADIK_SHA1_BASE 0x10190000 /* SHA-1 Processor */[all …]
15 #define RT3883_SDRAM_BASE 0x0000000016 #define RT3883_SYSC_BASE IOMEM(0x10000000)17 #define RT3883_TIMER_BASE 0x1000010018 #define RT3883_INTC_BASE 0x1000020019 #define RT3883_MEMC_BASE 0x1000030020 #define RT3883_UART0_BASE 0x1000050021 #define RT3883_PIO_BASE 0x1000060022 #define RT3883_FSCC_BASE 0x1000070023 #define RT3883_NANDC_BASE 0x1000081024 #define RT3883_I2C_BASE 0x10000900[all …]
197 reg = <0x10180000 0x40000>;
13 #size-cells = <0>;15 cpu0: cpu@0 {17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";18 reg = <0>;26 compatible = "ingenic,xburst-fpu1.0-mxu1.1";35 #address-cells = <0>;43 reg = <0x10001000 0x50>;54 #clock-cells = <0>;59 #clock-cells = <0>;65 reg = <0x10000000 0x100>;[all …]
39 #clock-cells = <0>;45 reg = <0x10090000 0x10000>;56 reg = <0x10104000 0x800>;68 reg = <0x10138000 0x1000>;75 reg = <0x1013c000 0x100>;80 reg = <0x1013c200 0x20>;94 reg = <0x1013c600 0x20>;103 reg = <0x1013d000 0x1000>,104 <0x1013c100 0x0100>;109 reg = <0x10124000 0x400>;[all …]
37 #size-cells = <0>;43 reg = <0xf00>;56 reg = <0xf01>;87 #clock-cells = <0>;92 reg = <0x10080000 0x2000>;95 ranges = <0 0x10080000 0x2000>;97 smp-sram@0 {99 reg = <0x00 0x10>;105 reg = <0x10090000 0x10000>;125 reg = <0x10108000 0x800>;[all …]
44 #size-cells = <0>;50 reg = <0xf00>;61 reg = <0xf01>;69 reg = <0xf02>;77 reg = <0xf03>;83 cpu_opp_table: opp-table-0 {159 #clock-cells = <0>;164 reg = <0x10080000 0x2000>;167 ranges = <0 0x10080000 0x2000>;169 smp-sram@0 {[all …]