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/linux-6.12.1/arch/mips/include/asm/sibyte/
Dbigsur.h19 #define LEDS_PHYS 0x100a0000
23 #define IDE_PHYS 0x100b0000
30 #define PCMCIA_PHYS 0x11000000
Dswarm.h18 #define SIBYTE_HAVE_PCMCIA 0
24 #define SIBYTE_HAVE_PCMCIA 0
25 #define SIBYTE_HAVE_IDE 0
30 #define LEDS_PHYS 0x100a0000
34 #define IDE_PHYS 0x100b0000
41 #define PCMCIA_PHYS 0x11000000
/linux-6.12.1/Documentation/devicetree/bindings/sound/
Dstarfive,jh7110-pwmdac.yaml50 const: 0
68 reg = <0x100b0000 0x1000>;
75 #sound-dai-cells = <0>;
/linux-6.12.1/arch/arm/boot/dts/samsung/
Dexynos5260.dtsi35 #size-cells = <0>;
63 cpu0: cpu@0 {
66 reg = <0x0>;
73 reg = <0x1>;
80 reg = <0x100>;
87 reg = <0x101>;
94 reg = <0x102>;
101 reg = <0x103>;
114 reg = <0x10010000 0x10000>;
128 reg = <0x10200000 0x10000>;
[all …]
Dexynos4.dtsi68 reg = <0x03810000 0x0c>;
79 reg = <0x03830000 0x100>;
88 samsung,idma-addr = <0x03000000>;
95 reg = <0x10000000 0x100>;
100 reg = <0x10500000 0x2000>;
105 reg = <0x12570000 0x14>;
110 reg = <0x10023c40 0x20>;
111 #power-domain-cells = <0>;
117 reg = <0x10023c60 0x20>;
118 #power-domain-cells = <0>;
[all …]
/linux-6.12.1/drivers/virtio/
Dvirtio_mmio.c20 * .start = 0x1001e000,
21 * .end = 0x1001e0ff,
35 * reg = <0x1e000 0x100>;
49 * virtio_mmio.device=0x100@0x100b0000:48 \
50 * virtio_mmio.device=1K@0x1001e000:74
118 writel(0, vm_dev->base + VIRTIO_MMIO_DEVICE_FEATURES_SEL); in vm_get_features()
142 writel(0, vm_dev->base + VIRTIO_MMIO_DRIVER_FEATURES_SEL); in vm_finalize_features()
146 return 0; in vm_finalize_features()
162 for (i = 0; i < len; i++) in vm_get()
204 for (i = 0; i < len; i++) in vm_set()
[all …]
/linux-6.12.1/drivers/net/ethernet/microchip/sparx5/
Dsparx5_main.c55 { TARGET_CPU, 0, 0 }, /* 0x600000000 */
56 { TARGET_FDMA, 0x80000, 0 }, /* 0x600080000 */
57 { TARGET_PCEP, 0x400000, 0 }, /* 0x600400000 */
58 { TARGET_DEV2G5, 0x10004000, 1 }, /* 0x610004000 */
59 { TARGET_DEV5G, 0x10008000, 1 }, /* 0x610008000 */
60 { TARGET_PCS5G_BR, 0x1000c000, 1 }, /* 0x61000c000 */
61 { TARGET_DEV2G5 + 1, 0x10010000, 1 }, /* 0x610010000 */
62 { TARGET_DEV5G + 1, 0x10014000, 1 }, /* 0x610014000 */
63 { TARGET_PCS5G_BR + 1, 0x10018000, 1 }, /* 0x610018000 */
64 { TARGET_DEV2G5 + 2, 0x1001c000, 1 }, /* 0x61001c000 */
[all …]
/linux-6.12.1/arch/arm64/boot/dts/tesla/
Dfsd.dtsi39 #size-cells = <0>;
88 /* Cluster 0 */
89 cpucl0_0: cpu@0 {
92 reg = <0x0 0x000>;
96 i-cache-size = <0xc000>;
99 d-cache-size = <0x8000>;
108 reg = <0x0 0x001>;
112 i-cache-size = <0xc000>;
115 d-cache-size = <0x8000>;
124 reg = <0x0 0x002>;
[all …]
/linux-6.12.1/arch/riscv/boot/dts/starfive/
Djh7110.dtsi20 #size-cells = <0>;
22 S7_0: cpu@0 {
24 reg = <0>;
200 cpu_opp: opp-table-0 {
260 #clock-cells = <0>;
265 #clock-cells = <0>;
271 #clock-cells = <0>;
277 #clock-cells = <0>;
283 #clock-cells = <0>;
289 #clock-cells = <0>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/rockchip/
Drk322x.dtsi30 #size-cells = <0>;
35 reg = <0xf00>;
47 reg = <0xf01>;
57 reg = <0xf02>;
67 reg = <0xf03>;
75 cpu0_opp_table: opp-table-0 {
131 #clock-cells = <0>;
141 reg = <0x100b0000 0x4000>;
148 pinctrl-0 = <&i2s1_bus>;
154 reg = <0x100c0000 0x4000>;
[all …]
/linux-6.12.1/Documentation/admin-guide/
Dkernel-parameters.txt36 1,0: use 1st APIC table
37 default: 0
77 acpi.debug_layer=0x20000000
80 acpi.debug_layer=0xffffffff acpi.debug_level=0x2
82 acpi.debug_layer=0x2 acpi.debug_level=0xffffffff
291 behaviour to be specified. Bit 0 enables warnings,
376 to bias toward performance (0x0) or energy efficiency (0xff)
420 bsp: External NMI is delivered only to CPU 0
422 backup of CPU 0
434 Format: { "0" | "1" }
[all …]