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/linux-6.12.1/Documentation/devicetree/bindings/i2c/
Dingenic,i2c.yaml17 pattern: "^i2c@[0-9a-f]+$"
69 #size-cells = <0>;
70 reg = <0x10054000 0x1000>;
76 pinctrl-0 = <&pins_i2c4_data>;
78 dmas = <&dma JZ4780_DMA_SMB4_RX 0xffffffff>,
79 <&dma JZ4780_DMA_SMB4_TX 0xffffffff>;
86 reg = <0x51>;
/linux-6.12.1/arch/mips/boot/dts/ingenic/
Djz4780.dtsi13 #size-cells = <0>;
15 cpu0: cpu@0 {
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
18 reg = <0>;
26 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
35 #address-cells = <0>;
43 reg = <0x10001000 0x50>;
54 #clock-cells = <0>;
59 #clock-cells = <0>;
65 reg = <0x10000000 0x100>;
[all …]
/linux-6.12.1/drivers/net/ethernet/microchip/sparx5/
Dsparx5_main.c55 { TARGET_CPU, 0, 0 }, /* 0x600000000 */
56 { TARGET_FDMA, 0x80000, 0 }, /* 0x600080000 */
57 { TARGET_PCEP, 0x400000, 0 }, /* 0x600400000 */
58 { TARGET_DEV2G5, 0x10004000, 1 }, /* 0x610004000 */
59 { TARGET_DEV5G, 0x10008000, 1 }, /* 0x610008000 */
60 { TARGET_PCS5G_BR, 0x1000c000, 1 }, /* 0x61000c000 */
61 { TARGET_DEV2G5 + 1, 0x10010000, 1 }, /* 0x610010000 */
62 { TARGET_DEV5G + 1, 0x10014000, 1 }, /* 0x610014000 */
63 { TARGET_PCS5G_BR + 1, 0x10018000, 1 }, /* 0x610018000 */
64 { TARGET_DEV2G5 + 2, 0x1001c000, 1 }, /* 0x61001c000 */
[all …]