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/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dlsi,axm5516-clks.txt18 reg = <0x20 0x10020000 0 0x20000>;
23 reg = <0x20 0x10080000 0 0x1000>;
/linux-6.12.1/Documentation/devicetree/bindings/media/
Dmediatek-vpu.txt25 reg = <0 0x10020000 0 0x30000>,
26 <0 0x10050000 0 0x100>;
/linux-6.12.1/drivers/gpu/drm/msm/dsi/
Ddsi_cfg.h11 #define MSM_DSI_VER_MAJOR_V2 0x02
12 #define MSM_DSI_VER_MAJOR_6G 0x03
13 #define MSM_DSI_6G_VER_MINOR_V1_0 0x10000000
14 #define MSM_DSI_6G_VER_MINOR_V1_0_2 0x10000002
15 #define MSM_DSI_6G_VER_MINOR_V1_1 0x10010000
16 #define MSM_DSI_6G_VER_MINOR_V1_1_1 0x10010001
17 #define MSM_DSI_6G_VER_MINOR_V1_2 0x10020000
18 #define MSM_DSI_6G_VER_MINOR_V1_3 0x10030000
19 #define MSM_DSI_6G_VER_MINOR_V1_3_1 0x10030001
20 #define MSM_DSI_6G_VER_MINOR_V1_4_1 0x10040001
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/sound/
Dingenic,aic.yaml32 const: 0
77 reg = <0x10020000 0x38>;
79 #sound-dai-cells = <0>;
88 dmas = <&dmac 25 0xffffffff>, <&dmac 24 0xffffffff>;
/linux-6.12.1/Documentation/devicetree/bindings/pwm/
Dpwm-sifive.yaml67 reg = <0x10020000 0x1000>;
/linux-6.12.1/Documentation/devicetree/bindings/pci/
Dti,am65-pci-host.yaml70 pattern: '^pcie-phy[0-1]$'
104 reg = <0x5500000 0x1000>,
105 <0x5501000 0x1000>,
106 <0x10000000 0x2000>,
107 <0x5506000 0x1000>;
112 ranges = <0x81000000 0 0 0x10020000 0 0x00010000>,
113 <0x82000000 0 0x10030000 0x10030000 0 0x07FD0000>;
114 ti,syscon-pcie-id = <&scm_conf 0x0210>;
115 ti,syscon-pcie-mode = <&scm_conf 0x4060>;
116 bus-range = <0x0 0xff>;
[all …]
/linux-6.12.1/drivers/gpu/drm/msm/dp/
Ddp_catalog.h15 #define DP_INTR_HPD BIT(0)
26 #define DP_INTR_READY_FOR_VIDEO BIT(0)
31 #define DP_HW_VERSION_1_0 0x10000000
32 #define DP_HW_VERSION_1_2 0x10020000
/linux-6.12.1/Documentation/devicetree/bindings/display/
Darm,pl11x.yaml103 CLD[23:0] pads are wired up.
119 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
121 arm,pl11x,tft-r0g0b0-pads = <16 8 0>;
147 reg = <0x10020000 0x1000>;
/linux-6.12.1/arch/arm/boot/dts/intel/axm/
Daxm55xx.dtsi32 #clock-cells = <0>;
38 #clock-cells = <0>;
44 #clock-cells = <0>;
51 reg = <0x20 0x10020000 0 0x20000>;
58 #address-cells = <0>;
60 reg = <0x20 0x01001000 0 0x1000>,
61 <0x20 0x01002000 0 0x2000>,
62 <0x20 0x01004000 0 0x2000>,
63 <0x20 0x01006000 0 0x2000>;
97 reg = <0x20 0x10030000 0 0x2000>;
[all …]
/linux-6.12.1/arch/mips/boot/dts/ingenic/
Djz4740.dtsi12 #size-cells = <0>;
14 cpu0: cpu@0 {
16 compatible = "ingenic,xburst-mxu1.0";
17 reg = <0>;
25 #address-cells = <0>;
33 reg = <0x10001000 0x14>;
44 #clock-cells = <0>;
49 #clock-cells = <0>;
55 reg = <0x10000000 0x100>;
65 reg = <0x10002000 0x1000>;
[all …]
Djz4725b.dtsi12 #size-cells = <0>;
14 cpu0: cpu@0 {
16 compatible = "ingenic,xburst-mxu1.0";
17 reg = <0>;
25 #address-cells = <0>;
33 reg = <0x10001000 0x14>;
44 #clock-cells = <0>;
49 #clock-cells = <0>;
55 reg = <0x10000000 0x100>;
65 reg = <0x10002000 0x1000>;
[all …]
Djz4770.dtsi12 #size-cells = <0>;
14 cpu0: cpu@0 {
16 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
17 reg = <0>;
25 #address-cells = <0>;
33 reg = <0x10001000 0x40>;
44 #clock-cells = <0>;
49 #clock-cells = <0>;
55 reg = <0x10000000 0x100>;
58 ranges = <0x0 0x10000000 0x100>;
[all …]
Dx1000.dtsi13 #size-cells = <0>;
15 cpu0: cpu@0 {
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
18 reg = <0>;
26 #address-cells = <0>;
34 reg = <0x10001000 0x50>;
45 #clock-cells = <0>;
50 #clock-cells = <0>;
56 reg = <0x10000000 0x100>;
59 ranges = <0x0 0x10000000 0x100>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/arm/
Dvexpress-v2p-ca9.dts16 arm,hbi = <0x191>;
17 arm,vexpress,site = <0xf>;
38 #size-cells = <0>;
40 A9_0: cpu@0 {
43 reg = <0>;
71 reg = <0x60000000 0x40000000>;
79 /* Chipselect 3 is physically at 0x4c000000 */
83 reg = <0x4c000000 0x00800000>;
90 reg = <0x10020000 0x1000>;
92 interrupts = <0 44 4>;
[all …]
Darm-realview-eb.dtsi43 /* 128 MiB memory @ 0x0 */
44 reg = <0x00000000 0x08000000>;
57 #clock-cells = <0>;
63 #clock-cells = <0>;
72 #clock-cells = <0>;
74 clock-frequency = <0>;
80 reg = <0x40000000 0x04000000>;
90 reg = <0x44000000 0x04000000>;
100 reg = <0x4e000000 0x10000>;
110 reg = <0x4f000000 0x20000>;
[all …]
Darm-realview-pbx.dtsi44 /* 128 MiB memory @ 0x0 */
45 reg = <0x00000000 0x08000000>;
66 #clock-cells = <0>;
72 #clock-cells = <0>;
78 #clock-cells = <0>;
87 #clock-cells = <0>;
89 clock-frequency = <0>;
95 reg = <0x40000000 0x04000000>;
105 reg = <0x44000000 0x04000000>;
115 reg = <0x4e000000 0x10000>;
[all …]
Darm-realview-pb11mp.dts45 * The PB11MPCore has 512 MiB memory @ 0x70000000
46 * and the first 256 are also remapped @ 0x00000000
48 reg = <0x70000000 0x20000000>;
53 #size-cells = <0>;
56 MP11_0: cpu@0 {
59 reg = <0>;
91 reg = <0x1f001000 0x1000>,
92 <0x1f000100 0x100>;
97 reg = <0x1f002000 0x1000>;
99 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>,
[all …]
/linux-6.12.1/arch/riscv/boot/dts/sifive/
Dfu540-c000.dtsi24 #size-cells = <0>;
25 cpu0: cpu@0 {
31 reg = <0>;
182 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
183 reg = <0x0 0xc000000 0x0 0x4000000>;
184 #address-cells = <0>;
188 <&cpu0_intc 0xffffffff>,
189 <&cpu1_intc 0xffffffff>, <&cpu1_intc 9>,
190 <&cpu2_intc 0xffffffff>, <&cpu2_intc 9>,
191 <&cpu3_intc 0xffffffff>, <&cpu3_intc 9>,
[all …]
Dfu740-c000.dtsi24 #size-cells = <0>;
25 cpu0: cpu@0 {
32 reg = <0x0>;
59 reg = <0x1>;
86 reg = <0x2>;
113 reg = <0x3>;
140 reg = <0x4>;
184 #address-cells = <0>;
185 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
186 reg = <0x0 0xc000000 0x0 0x4000000>;
[all …]
/linux-6.12.1/arch/riscv/boot/dts/starfive/
Djh7100.dtsi18 #size-cells = <0>;
20 U74_0: cpu@0 {
22 reg = <0>;
118 #clock-cells = <0>;
121 clock-frequency = <0>;
126 #clock-cells = <0>;
129 clock-frequency = <0>;
134 #clock-cells = <0>;
137 clock-frequency = <0>;
142 #clock-cells = <0>;
[all …]
/linux-6.12.1/arch/powerpc/boot/dts/
Dakebono.dts14 /memreserve/ 0x01f00000 0x00100000; // spin table
21 dcr-parent = <&{/cpus/cpu@0}>;
29 #size-cells = <0>;
31 cpu@0 {
34 reg = <0>;
59 cpu-release-addr = <0x0 0x01f00000>;
65 reg = <0x0 0x0 0x0 0x0>; // filled in by zImage
71 dcr-reg = <0xffc00000 0x00040000>;
72 #address-cells = <0>;
73 #size-cells = <0>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/nxp/imx/
Dimx27.dtsi47 reg = <0x10040000 0x1000>;
53 #clock-cells = <0>;
59 #size-cells = <0>;
62 cpu: cpu@0 {
64 reg = <0>;
88 reg = <0x10000000 0x20000>;
93 reg = <0x10001000 0x1000>;
104 reg = <0x10002000 0x1000>;
111 reg = <0x10003000 0x1000>;
120 reg = <0x10004000 0x1000>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/exynos/
Dexynos850.dtsi52 #clock-cells = <0>;
57 #size-cells = <0>;
91 cpu0: cpu@0 {
94 reg = <0x0>;
102 reg = <0x1>;
108 reg = <0x2>;
114 reg = <0x3>;
120 reg = <0x100>;
128 reg = <0x101>;
134 reg = <0x102>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/samsung/
Dexynos3250.dtsi199 #size-cells = <0>;
212 cpu0: cpu@0 {
215 reg = <0>;
259 xusbxti: clock-0 {
261 clock-frequency = <0>;
262 #clock-cells = <0>;
268 clock-frequency = <0>;
269 #clock-cells = <0>;
275 clock-frequency = <0>;
276 #clock-cells = <0>;
[all …]
Dexynos4.dtsi68 reg = <0x03810000 0x0c>;
79 reg = <0x03830000 0x100>;
88 samsung,idma-addr = <0x03000000>;
95 reg = <0x10000000 0x100>;
100 reg = <0x10500000 0x2000>;
105 reg = <0x12570000 0x14>;
110 reg = <0x10023c40 0x20>;
111 #power-domain-cells = <0>;
117 reg = <0x10023c60 0x20>;
118 #power-domain-cells = <0>;
[all …]

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