Searched +full:0 +full:x10000800 (Results 1 – 11 of 11) sorted by relevance
/linux-6.12.1/Documentation/devicetree/bindings/spi/ |
D | brcm,bcm63xx-spi.yaml | 64 reg = <0x10000800 0x70c>; 70 #size-cells = <0>;
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/linux-6.12.1/arch/mips/boot/dts/brcm/ |
D | bcm6362.dtsi | 14 #size-cells = <0>; 18 cpu@0 { 21 reg = <0>; 34 #clock-cells = <0>; 42 #clock-cells = <0>; 58 #address-cells = <0>; 74 reg = <0x10000004 0x4>; 80 reg = <0x10000008 0x4>; 85 offset = <0x0>; 86 mask = <0x1>; [all …]
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D | bcm6328.dtsi | 14 #size-cells = <0>; 18 cpu@0 { 21 reg = <0>; 34 #clock-cells = <0>; 41 #clock-cells = <0>; 55 #address-cells = <0>; 71 reg = <0x10000004 0x4>; 77 reg = <0x10000010 0x4>; 83 reg = <0x10000020 0x10>, 84 <0x10000030 0x10>; [all …]
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D | bcm6368.dtsi | 13 #size-cells = <0>; 17 cpu@0 { 20 reg = <0>; 33 #clock-cells = <0>; 48 #address-cells = <0>; 64 reg = <0x10000004 0x4>; 70 reg = <0x10000008 0x4>; 75 offset = <0x0>; 76 mask = <0x1>; 82 reg = <0x10000010 0x4>; [all …]
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D | bcm63268.dtsi | 14 #size-cells = <0>; 18 cpu@0 { 21 reg = <0>; 34 #clock-cells = <0>; 42 #clock-cells = <0>; 58 #address-cells = <0>; 74 reg = <0x10000004 0x4>; 80 reg = <0x10000008 0x4>; 85 offset = <0x0>; 86 mask = <0x1>; [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/leds/ |
D | leds-bcm6328.yaml | 26 with 0 meaning hardware control enabled and 1 hardware control disabled. This 67 const: 0 79 description: LED pin number (only LEDs 0 to 23 are valid). 91 signals can get muxed into these LEDs. Only valid for LEDs 0 to 7, 92 where LED signals 0 to 3 may be muxed to LEDs 0 to 3, and signals 4 to 102 hardware signals can get muxed into these LEDs. Only valid for LEDs 0 103 to 7, where LED signals 0 to 3 may be muxed to LEDs 0 to 3, and 125 #size-cells = <0>; 126 reg = <0x10000800 0x24>; 172 #size-cells = <0>; [all …]
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/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/ |
D | gk208.fuc5.h | 3 /* 0x0000: proc_kern */ 4 0x52544e49, 5 0x00000000, 6 0x00000000, 7 0x00000000, 8 0x00000000, 9 0x00000000, 10 0x00000000, 11 0x00000000, 12 0x00000000, [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
D | si.c | 61 mmAZALIA_SCLK_CONTROL, 0x00000030, 0x00000011, 62 mmCB_HW_CONTROL, 0x00010000, 0x00018208, 63 mmDB_DEBUG, 0xffffffff, 0x00000000, 64 mmDB_DEBUG2, 0xf00fffff, 0x00000400, 65 mmDB_DEBUG3, 0x0002021c, 0x00020200, 66 mmDCI_CLK_CNTL, 0x00000080, 0x00000000, 67 0x340c, 0x000000c0, 0x00800040, 68 0x360c, 0x000000c0, 0x00800040, 69 mmFBC_DEBUG_COMP, 0x000000f0, 0x00000070, 70 mmFBC_MISC, 0x00200000, 0x50100000, [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/ |
D | gc_10_3_0_default.h | 27 #define mmSDMA0_DEC_START_DEFAULT 0x00000000 28 #define mmSDMA0_GLOBAL_TIMESTAMP_LO_DEFAULT 0x00000000 29 #define mmSDMA0_GLOBAL_TIMESTAMP_HI_DEFAULT 0x00000000 30 #define mmSDMA0_PG_CNTL_DEFAULT 0x00000000 31 #define mmSDMA0_PG_CTX_LO_DEFAULT 0x00000000 32 #define mmSDMA0_PG_CTX_HI_DEFAULT 0x00000000 33 #define mmSDMA0_PG_CTX_CNTL_DEFAULT 0x00000000 34 #define mmSDMA0_POWER_CNTL_DEFAULT 0x40000050 35 #define mmSDMA0_CLK_CTRL_DEFAULT 0x00000100 36 #define mmSDMA0_CNTL_DEFAULT 0x000000c2 [all …]
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/linux-6.12.1/drivers/gpu/drm/radeon/ |
D | si.c | 159 #define DC_HPDx_CONTROL(x) (DC_HPD1_CONTROL + (x * 0xc)) 160 #define DC_HPDx_INT_CONTROL(x) (DC_HPD1_INT_CONTROL + (x * 0xc)) 161 #define DC_HPDx_INT_STATUS_REG(x) (DC_HPD1_INT_STATUS + (x * 0xc)) 164 (0x8000 << 16) | (0x98f4 >> 2), 165 0x00000000, 166 (0x8040 << 16) | (0x98f4 >> 2), 167 0x00000000, 168 (0x8000 << 16) | (0xe80 >> 2), 169 0x00000000, 170 (0x8040 << 16) | (0xe80 >> 2), [all …]
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/linux-6.12.1/drivers/net/wireless/realtek/rtw89/ |
D | rtw8852a_table.c | 10 {0xF0FF0001, 0x00000000}, 11 {0xF03300FF, 0x00000001}, 12 {0xF03500FF, 0x00000002}, 13 {0xF03200FF, 0x00000003}, 14 {0xF03400FF, 0x00000004}, 15 {0xF03600FF, 0x00000005}, 16 {0x704, 0x601E0100}, 17 {0x714, 0x00000000}, 18 {0x718, 0x13332333}, 19 {0x714, 0x00010000}, [all …]
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