Searched +full:0 +full:x0aa00000 (Results 1 – 9 of 9) sorted by relevance
| /linux-6.12.1/Documentation/devicetree/bindings/media/ |
| D | qcom,sc7180-venus.yaml | 103 reg = <0x0aa00000 0xff000>;
115 iommus = <&apps_smmu 0x0c00 0x60>;
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| D | qcom,sdm845-venus.yaml | 105 reg = <0x0aa00000 0xff000>;
112 iommus = <&apps_smmu 0x10a0 0x8>,
113 <&apps_smmu 0x10b0 0x0>;
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| D | qcom,sdm845-venus-v2.yaml | 103 reg = <0x0aa00000 0xff000>;
119 iommus = <&apps_smmu 0x10a0 0x8>,
120 <&apps_smmu 0x10b0 0x0>;
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| D | qcom,sc7280-venus.yaml | 103 reg = <0x0aa00000 0xd0600>;
119 interconnects = <&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_VENUS_CFG 0>,
120 <&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI1 0>;
123 iommus = <&apps_smmu 0x2180 0x20>,
124 <&apps_smmu 0x2184 0x20>;
137 iommus = <&apps_smmu 0x21a2 0x0>;
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| D | qcom,sm8250-venus.yaml | 113 reg = <0x0aa00000 0xff000>;
129 iommus = <&apps_smmu 0x2100 0x0400>;
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| /linux-6.12.1/arch/arm64/boot/dts/qcom/ |
| D | sc7180.dtsi | 66 #clock-cells = <0>;
72 #clock-cells = <0>;
78 #size-cells = <0>;
80 CPU0: cpu@0 {
83 reg = <0x0 0x0>;
84 clocks = <&cpufreq_hw 0>;
95 qcom,freq-domain = <&cpufreq_hw 0>;
112 reg = <0x0 0x100>;
113 clocks = <&cpufreq_hw 0>;
124 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
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| D | sdm845.dtsi | 78 #clock-cells = <0>;
85 #clock-cells = <0>;
92 #size-cells = <0>;
94 CPU0: cpu@0 {
97 reg = <0x0 0x0>;
98 clocks = <&cpufreq_hw 0>;
102 qcom,freq-domain = <&cpufreq_hw 0>;
126 reg = <0x0 0x100>;
127 clocks = <&cpufreq_hw 0>;
131 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
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| D | sm8250.dtsi | 80 #clock-cells = <0>;
88 #clock-cells = <0>;
94 #size-cells = <0>;
96 CPU0: cpu@0 {
99 reg = <0x0 0x0>;
100 clocks = <&cpufreq_hw 0>;
107 qcom,freq-domain = <&cpufreq_hw 0>;
109 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
115 cache-size = <0x20000>;
121 cache-size = <0x400000>;
[all …]
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| D | sc7280.dtsi | 81 #clock-cells = <0>;
87 #clock-cells = <0>;
98 reg = <0x0 0x004cd000 0x0 0x1000>;
102 reg = <0x0 0x80000000 0x0 0x600000>;
107 reg = <0x0 0x80600000 0x0 0x200000>;
112 reg = <0x0 0x80800000 0x0 0x60000>;
117 reg = <0x0 0x80860000 0x0 0x20000>;
123 reg = <0x0 0x80884000 0x0 0x10000>;
128 reg = <0x0 0x808ff000 0x0 0x1000>;
133 reg = <0x0 0x80900000 0x0 0x200000>;
[all …]
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