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/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dqcom,sm6125-gpucc.yaml57 reg = <0x05990000 0x9000>;
Dqcom,sm6115-gpucc.yaml49 reg = <0x05990000 0x9000>;
Dqcom,qcm2290-gpucc.yaml65 reg = <0x0 0x05990000 0x0 0x9000>;
Dqcom,sm6375-gpucc.yaml63 reg = <0 0x05990000 0 0x9000>;
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dqcm2290.dtsi31 #clock-cells = <0>;
37 #clock-cells = <0>;
43 #size-cells = <0>;
45 CPU0: cpu@0 {
48 reg = <0x0 0x0>;
49 clocks = <&cpufreq_hw 0>;
54 qcom,freq-domain = <&cpufreq_hw 0>;
67 reg = <0x0 0x1>;
68 clocks = <&cpufreq_hw 0>;
73 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dsm6375.dtsi27 #clock-cells = <0>;
33 #clock-cells = <0>;
39 #size-cells = <0>;
41 CPU0: cpu@0 {
44 reg = <0x0 0x0>;
45 clocks = <&cpufreq_hw 0>;
48 qcom,freq-domain = <&cpufreq_hw 0>;
70 reg = <0x0 0x100>;
71 clocks = <&cpufreq_hw 0>;
74 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dsm6115.dtsi30 #clock-cells = <0>;
35 #clock-cells = <0>;
41 #size-cells = <0>;
43 CPU0: cpu@0 {
46 reg = <0x0 0x0>;
47 clocks = <&cpufreq_hw 0>;
52 qcom,freq-domain = <&cpufreq_hw 0>;
65 reg = <0x0 0x1>;
66 clocks = <&cpufreq_hw 0>;
71 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]