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/linux-6.12.1/Documentation/devicetree/bindings/sound/
Dqcom,wcd939x-sdw.yaml49 #size-cells = <0>;
50 reg = <0x03210000 0x2000>;
51 wcd938x_rx: codec@0,4 {
53 reg = <0 4>;
60 #size-cells = <0>;
61 reg = <0x03230000 0x2000>;
62 wcd938x_tx: codec@0,3 {
64 reg = <0 3>;
Dqcom,wcd938x-sdw.yaml50 #size-cells = <0>;
51 reg = <0x03210000 0x2000>;
52 wcd938x_rx: codec@0,4 {
54 reg = <0 4>;
61 #size-cells = <0>;
62 reg = <0x03230000 0x2000>;
63 wcd938x_tx: codec@0,3 {
65 reg = <0 3>;
Dqcom,wcd938x.yaml58 #size-cells = <0>;
59 reg = <0x03210000 0x2000>;
60 wcd938x_rx: codec@0,4 {
62 reg = <0 4>;
69 #size-cells = <0>;
70 reg = <0x03230000 0x2000>;
71 wcd938x_tx: codec@0,3 {
73 reg = <0 3>;
Dqcom,wcd937x.yaml43 pinctrl-0 = <&wcd_reset_n>;
62 reg = <0x03210000 0x2000>;
64 #size-cells = <0>;
65 wcd937x_rx: codec@0,4 {
67 reg = <0 4>;
73 reg = <0x03230000 0x2000>;
75 #size-cells = <0>;
76 wcd937x_tx: codec@0,3 {
78 reg = <0 3>;
Dqcom,wcd939x.yaml76 #size-cells = <0>;
77 reg = <0x03210000 0x2000>;
78 wcd939x_rx: codec@0,4 {
80 reg = <0 4>;
87 #size-cells = <0>;
88 reg = <0x03230000 0x2000>;
89 wcd938x_tx: codec@0,3 {
91 reg = <0 3>;
Dqcom,wcd937x-sdw.yaml70 reg = <0x03210000 0x2000>;
72 #size-cells = <0>;
73 wcd937x_rx: codec@0,4 {
75 reg = <0 4>;
81 reg = <0x03230000 0x2000>;
83 #size-cells = <0>;
84 wcd937x_tx: codec@0,3 {
86 reg = <0 3>;
/linux-6.12.1/Documentation/devicetree/bindings/soundwire/
Dqcom,soundwire.yaml64 const: 0
80 Value of 0xff indicates that this option is not implemented
91 Value of 0xff indicates that this option is not implemented
102 Value of 0xffff indicates that this option is not implemented
113 Value of 0xff indicates that this option is not implemented
124 Value of 0xff indicates that this option is not implemented
135 Value of 0xff indicates that this option is not implemented
145 0 to indicate Blocks are per Channel
148 Value of 0xff indicates that this option is not implemented
155 - minimum: 0
[all …]
/linux-6.12.1/arch/arm/mach-rpc/
Decard.c94 return v[0] | v[1] << 8; in ecard_getu16()
99 return v[0] | v[1] << 8 | v[2] << 16 | ((v[2] & 0x80) ? 0xff000000 : 0); in ecard_gets24()
159 * If we are reading offset 0, or our current index is in ecard_task_readbytes()
162 if (off == 0 || index > off) { in ecard_task_readbytes()
163 writeb(0, base); in ecard_task_readbytes()
164 index = 0; in ecard_task_readbytes()
198 *(unsigned long *)0x108 = 0; in ecard_task_readbytes()
220 * 0x03000000 0x03000000 in ecard_init_pgtables()
221 * 0x03010000 unmapped in ecard_init_pgtables()
222 * 0x03210000 0x03210000 in ecard_init_pgtables()
[all …]
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsm8450.dtsi39 #clock-cells = <0>;
45 #clock-cells = <0>;
52 #size-cells = <0>;
54 CPU0: cpu@0 {
57 reg = <0x0 0x0>;
62 qcom,freq-domain = <&cpufreq_hw 0>;
64 clocks = <&cpufreq_hw 0>;
81 reg = <0x0 0x100>;
86 qcom,freq-domain = <&cpufreq_hw 0>;
88 clocks = <&cpufreq_hw 0>;
[all …]
Dsc8280xp.dtsi33 #clock-cells = <0>;
38 #clock-cells = <0>;
45 #size-cells = <0>;
47 CPU0: cpu@0 {
50 reg = <0x0 0x0>;
51 clocks = <&cpufreq_hw 0>;
58 qcom,freq-domain = <&cpufreq_hw 0>;
78 reg = <0x0 0x100>;
79 clocks = <&cpufreq_hw 0>;
86 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dsm8250.dtsi80 #clock-cells = <0>;
88 #clock-cells = <0>;
94 #size-cells = <0>;
96 CPU0: cpu@0 {
99 reg = <0x0 0x0>;
100 clocks = <&cpufreq_hw 0>;
107 qcom,freq-domain = <&cpufreq_hw 0>;
109 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
115 cache-size = <0x20000>;
121 cache-size = <0x400000>;
[all …]
Dsc7280.dtsi81 #clock-cells = <0>;
87 #clock-cells = <0>;
98 reg = <0x0 0x004cd000 0x0 0x1000>;
102 reg = <0x0 0x80000000 0x0 0x600000>;
107 reg = <0x0 0x80600000 0x0 0x200000>;
112 reg = <0x0 0x80800000 0x0 0x60000>;
117 reg = <0x0 0x80860000 0x0 0x20000>;
123 reg = <0x0 0x80884000 0x0 0x10000>;
128 reg = <0x0 0x808ff000 0x0 0x1000>;
133 reg = <0x0 0x80900000 0x0 0x200000>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/nvidia/
Dtegra234.dtsi19 bus@0 {
24 ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
28 reg = <0x0 0x00100000 0x0 0xf000>,
29 <0x0 0x0010f000 0x0 0x1000>;
35 reg = <0x0 0x02080000 0x0 0x00121000>;
36 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
58 reg = <0x0 0x02200000 0x0 0x10000>,
59 <0x0 0x02210000 0x0 0x10000>;
112 gpio-ranges = <&pinmux 0 0 164>;
117 reg = <0x0 0x2430000 0x0 0x19100>;
[all …]