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/linux-6.12.1/Documentation/devicetree/bindings/iio/adc/
Dallwinner,sun8i-a33-ths.yaml15 const: 0
18 const: 0
38 reg = <0x01c25000 0x100>;
39 #thermal-sensor-cells = <0>;
40 #io-channel-cells = <0>;
/linux-6.12.1/Documentation/devicetree/bindings/mfd/
Dallwinner,sun4i-a10-ts.yaml15 const: 0
35 minimum: 0
43 minimum: 0
50 0: 4/2
67 reg = <0x01c25000 0x100>;
70 #thermal-sensor-cells = <0>;
72 allwinner,tp-sensitive-adjust = <0>;
/linux-6.12.1/Documentation/devicetree/bindings/thermal/
Dallwinner,sun8i-a83t-ths.yaml62 - 0
114 const: 0
146 reg = <0x01f04000 0x100>;
147 interrupts = <0 31 0>;
156 reg = <0x01c25000 0x400>;
157 clocks = <&ccu 0>, <&ccu 1>;
160 interrupts = <0 31 0>;
163 #thermal-sensor-cells = <0>;
169 reg = <0x05070400 0x100>;
170 clocks = <&ccu 0>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/allwinner/
Dsun50i-h5.dtsi11 #size-cells = <0>;
13 cpu0: cpu@0 {
16 reg = <0>;
84 reg = <0x01c00000 0x1000>;
91 reg = <0x00018000 0x1c000>;
94 ranges = <0 0x00018000 0x1c000>;
96 ve_sram: sram-section@0 {
99 reg = <0x000000 0x1c000>;
106 reg = <0x01c0e000 0x1000>;
117 reg = <0x01c15000 0x1000>;
[all …]
Dsun50i-a64.dtsi47 #size-cells = <0>;
49 cpu0: cpu@0 {
52 reg = <0>;
57 i-cache-size = <0x8000>;
60 d-cache-size = <0x8000>;
74 i-cache-size = <0x8000>;
77 d-cache-size = <0x8000>;
91 i-cache-size = <0x8000>;
94 d-cache-size = <0x8000>;
108 i-cache-size = <0x8000>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/allwinner/
Dsuniv-f1c100s.dtsi17 #clock-cells = <0>;
24 #clock-cells = <0>;
33 #size-cells = <0>;
35 cpu@0 {
38 reg = <0x0>;
51 reg = <0x01c00000 0x30>;
58 reg = <0x00010000 0x1000>;
61 ranges = <0 0x00010000 0x1000>;
63 otg_sram: sram-section@0 {
66 reg = <0x0000 0x1000>;
[all …]
Dsun8i-h3.dtsi72 #size-cells = <0>;
74 cpu0: cpu@0 {
77 reg = <0>;
155 reg = <0x01400000 0x20000>;
168 reg = <0x01c00000 0x1000>;
175 reg = <0x01d00000 0x80000>;
178 ranges = <0 0x01d00000 0x80000>;
180 ve_sram: sram-section@0 {
183 reg = <0x000000 0x80000>;
190 reg = <0x01c0e000 0x1000>;
[all …]
Dsun8i-a33.dtsi127 cpu@0 {
201 sound-dai = <&codec 0>;
208 reg = <0x01c0e000 0x1000>;
219 reg = <0x01c15000 0x1000>;
228 #sound-dai-cells = <0>;
230 reg = <0x01c22c00 0x200>;
243 reg = <0x01c22e00 0x400>;
252 reg = <0x01c25000 0x100>;
253 #thermal-sensor-cells = <0>;
254 #io-channel-cells = <0>;
[all …]
Dsun5i.dtsi56 #size-cells = <0>;
58 cpu0: cpu@0 {
61 reg = <0x0>;
97 #clock-cells = <0>;
104 #clock-cells = <0>;
119 size = <0x6000000>;
120 alloc-ranges = <0x40000000 0x10000000>;
135 reg = <0x01c00000 0x30>;
140 sram_a: sram@0 {
142 reg = <0x00000000 0xc000>;
[all …]
Dsun4i-a10.dtsi111 #size-cells = <0>;
112 cpu0: cpu@0 {
115 reg = <0x0>;
166 #clock-cells = <0>;
173 #clock-cells = <0>;
199 size = <0x6000000>;
200 alloc-ranges = <0x40000000 0x10000000>;
214 reg = <0x01c00000 0x30>;
219 sram_a: sram@0 {
221 reg = <0x00000000 0xc000>;
[all …]
Dsun6i-a31.dtsi101 #size-cells = <0>;
103 cpu0: cpu@0 {
106 reg = <0>;
213 #clock-cells = <0>;
221 #clock-cells = <0>;
238 #clock-cells = <0>;
245 #clock-cells = <0>;
252 #clock-cells = <0>;
254 reg = <0x01c200d0 0x4>;
274 reg = <0x01c02000 0x1000>;
[all …]
Dsun7i-a20.dtsi101 #size-cells = <0>;
103 cpu0: cpu@0 {
106 reg = <0>;
181 size = <0x6000000>;
182 alloc-ranges = <0x40000000 0x10000000>;
208 #clock-cells = <0>;
215 #clock-cells = <0>;
231 #clock-cells = <0>;
238 #clock-cells = <0>;
245 #clock-cells = <0>;
[all …]