Searched +full:0 +full:x01c0b000 (Results 1 – 9 of 9) sorted by relevance
/linux-6.12.1/Documentation/devicetree/bindings/net/ |
D | allwinner,sun8i-a83t-emac.yaml | 80 default: 0 81 minimum: 0 88 default: 0 89 minimum: 0 105 default: 0 106 minimum: 0 144 const: 0 159 "^ethernet-phy@[0-9a-f]$": 199 reg = <0x01c0b000 0x104>; 200 interrupts = <0 82 1>; [all …]
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D | allwinner,sun4i-a10-emac.yaml | 51 reg = <0x01c0b000 0x1000>;
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/linux-6.12.1/Documentation/devicetree/bindings/pci/ |
D | qcom,pcie-x1e80100.yaml | 91 reg = <0 0x01c08000 0 0x3000>, 92 <0 0x7c000000 0 0xf1d>, 93 <0 0x7c000f40 0 0xa8>, 94 <0 0x7c001000 0 0x1000>, 95 <0 0x7c100000 0 0x100000>, 96 <0 0x01c0b000 0 0x1000>; 98 ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>, 99 <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>; 101 bus-range = <0x00 0xff>; 103 linux,pci-domain = <0>; [all …]
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/linux-6.12.1/arch/arm/boot/dts/allwinner/ |
D | sun5i.dtsi | 56 #size-cells = <0>; 58 cpu0: cpu@0 { 61 reg = <0x0>; 97 #clock-cells = <0>; 104 #clock-cells = <0>; 119 size = <0x6000000>; 120 alloc-ranges = <0x40000000 0x10000000>; 135 reg = <0x01c00000 0x30>; 140 sram_a: sram@0 { 142 reg = <0x00000000 0xc000>; [all …]
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D | sun4i-a10.dtsi | 111 #size-cells = <0>; 112 cpu0: cpu@0 { 115 reg = <0x0>; 166 #clock-cells = <0>; 173 #clock-cells = <0>; 199 size = <0x6000000>; 200 alloc-ranges = <0x40000000 0x10000000>; 214 reg = <0x01c00000 0x30>; 219 sram_a: sram@0 { 221 reg = <0x00000000 0xc000>; [all …]
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D | sun7i-a20.dtsi | 101 #size-cells = <0>; 103 cpu0: cpu@0 { 106 reg = <0>; 181 size = <0x6000000>; 182 alloc-ranges = <0x40000000 0x10000000>; 208 #clock-cells = <0>; 215 #clock-cells = <0>; 231 #clock-cells = <0>; 238 #clock-cells = <0>; 245 #clock-cells = <0>; [all …]
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/linux-6.12.1/arch/arm64/boot/dts/qcom/ |
D | sc8280xp.dtsi | 33 #clock-cells = <0>; 38 #clock-cells = <0>; 45 #size-cells = <0>; 47 CPU0: cpu@0 { 50 reg = <0x0 0x0>; 51 clocks = <&cpufreq_hw 0>; 58 qcom,freq-domain = <&cpufreq_hw 0>; 78 reg = <0x0 0x100>; 79 clocks = <&cpufreq_hw 0>; 86 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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D | x1e80100.dtsi | 36 #clock-cells = <0>; 42 #clock-cells = <0>; 47 #clock-cells = <0>; 56 #clock-cells = <0>; 66 #size-cells = <0>; 68 CPU0: cpu@0 { 71 reg = <0x0 0x0>; 88 reg = <0x0 0x100>; 99 reg = <0x0 0x200>; 110 reg = <0x0 0x300>; [all …]
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D | sm8250.dtsi | 80 #clock-cells = <0>; 88 #clock-cells = <0>; 94 #size-cells = <0>; 96 CPU0: cpu@0 { 99 reg = <0x0 0x0>; 100 clocks = <&cpufreq_hw 0>; 107 qcom,freq-domain = <&cpufreq_hw 0>; 109 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 115 cache-size = <0x20000>; 121 cache-size = <0x400000>; [all …]
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