/linux-6.12.1/Documentation/devicetree/bindings/net/ |
D | mdio-mux-gpio.yaml | 44 gpios = <&gpio1 3 0>, <&gpio1 4 0>; 47 #size-cells = <0>; 52 #size-cells = <0>; 56 marvell,reg-init = <3 0x10 0 0x5777>, 57 <3 0x11 0 0x00aa>, 58 <3 0x12 0 0x4105>, 59 <3 0x13 0 0x0a60>; 65 marvell,reg-init = <3 0x10 0 0x5777>, 66 <3 0x11 0 0x00aa>, 67 <3 0x12 0 0x4105>, [all …]
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/linux-6.12.1/arch/mips/boot/dts/cavium-octeon/ |
D | octeon_3xxx.dts | 13 soc@0 { 15 phy0: ethernet-phy@0 { 19 <2 0x15 0xffcf 0>, /* Reg 2,21 Clear bits 4, 5 */ 21 <3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */ 23 <3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */ 24 reg = <0>; 31 <2 0x15 0xffcf 0>, /* Reg 2,21 Clear bits 4, 5 */ 33 <3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */ 35 <3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */ 42 marvell,reg-init = <3 0x10 0 0x5777>, [all …]
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D | octeon_68xx.dts | 16 soc@0 { 26 * 1) Controller register (0 or 7) 27 * 2) Bit within the register (0..63) 29 #address-cells = <0>; 31 reg = <0x10701 0x00000000 0x0 0x4000000>; 37 reg = <0x10700 0x00000800 0x0 0x100>; 40 * 1) GPIO pin number (0..15) 49 interrupts = <7 0>, <7 1>, <7 2>, <7 3>, 58 #size-cells = <0>; 59 reg = <0x11800 0x00003800 0x0 0x40>; [all …]
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/linux-6.12.1/drivers/media/usb/gspca/ |
D | xirlink_cit.c | 29 module_param(ibm_netcam_pro, int, 0); 44 #define CIT_MODEL0 0 /* bcd version 0.01 cams ie the xvp-500 */ 125 {0, 0x0000, 0x010c}, 126 {0, 0x0006, 0x012c}, 127 {0, 0x0078, 0x012d}, 128 {0, 0x0046, 0x012f}, 129 {0, 0xd141, 0x0124}, 130 {0, 0x0000, 0x0127}, 131 {0, 0xfea8, 0x0124}, 132 {1, 0x0000, 0x0116}, [all …]
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D | spca561.c | 37 #define Rev012A 0 64 .priv = 0}, 87 .priv = 0}, 112 #define SPCA561_INDEX_I2C_BASE 0x8800 113 #define SPCA561_SNAPBIT 0x20 114 #define SPCA561_SNAPCTRL 0x40 117 {0x0000, 0x8114}, /* Software GPIO output data */ 118 {0x0001, 0x8114}, /* Software GPIO output data */ 119 {0x0000, 0x8112}, /* Some kind of reset */ 123 {0x0003, 0x8701}, /* PCLK clock delay adjustment */ [all …]
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/linux-6.12.1/arch/sh/boards/mach-se/7721/ |
D | setup.c | 41 [0] = { 42 .start = PA_MRSHPC_IO + 0x1f0, 43 .end = PA_MRSHPC_IO + 0x1f0 + 8 , 47 .start = PA_MRSHPC_IO + 0x1f0 + 0x206, 48 .end = PA_MRSHPC_IO + 0x1f0 + 8 + 0x206 + 8, 79 __raw_writew(0x0000, 0xA405010C); /* PGCR */ in se7721_setup() 80 __raw_writew(0x0000, 0xA405010E); /* PHCR */ in se7721_setup() 81 __raw_writew(0x00AA, 0xA4050118); /* PPCR */ in se7721_setup() 82 __raw_writew(0x0000, 0xA4050124); /* PSELA */ in se7721_setup()
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/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
D | uvd_4_0_d.h | 26 #define ixUVD_CGC_CTRL2 0x00C1 27 #define ixUVD_CGC_MEM_CTRL 0x00C0 28 #define ixUVD_LMI_ADDR_EXT2 0x00AB 29 #define ixUVD_LMI_CACHE_CTRL 0x009B 30 #define ixUVD_LMI_SWAP_CNTL2 0x00AA 31 #define ixUVD_MIF_CURR_ADDR_CONFIG 0x0048 32 #define ixUVD_MIF_RECON1_ADDR_CONFIG 0x0114 33 #define ixUVD_MIF_REF_ADDR_CONFIG 0x004C 34 #define mmUVD_CGC_CTRL 0x3D2C 35 #define mmUVD_CGC_GATE 0x3D2A [all …]
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/linux-6.12.1/arch/s390/kernel/ |
D | perf_cpum_cf_events.c | 14 CPUMF_EVENT_ATTR(cf_fvn1, CPU_CYCLES, 0x0000); 15 CPUMF_EVENT_ATTR(cf_fvn1, INSTRUCTIONS, 0x0001); 16 CPUMF_EVENT_ATTR(cf_fvn1, L1I_DIR_WRITES, 0x0002); 17 CPUMF_EVENT_ATTR(cf_fvn1, L1I_PENALTY_CYCLES, 0x0003); 18 CPUMF_EVENT_ATTR(cf_fvn1, PROBLEM_STATE_CPU_CYCLES, 0x0020); 19 CPUMF_EVENT_ATTR(cf_fvn1, PROBLEM_STATE_INSTRUCTIONS, 0x0021); 20 CPUMF_EVENT_ATTR(cf_fvn1, PROBLEM_STATE_L1I_DIR_WRITES, 0x0022); 21 CPUMF_EVENT_ATTR(cf_fvn1, PROBLEM_STATE_L1I_PENALTY_CYCLES, 0x0023); 22 CPUMF_EVENT_ATTR(cf_fvn1, PROBLEM_STATE_L1D_DIR_WRITES, 0x0024); 23 CPUMF_EVENT_ATTR(cf_fvn1, PROBLEM_STATE_L1D_PENALTY_CYCLES, 0x0025); [all …]
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/linux-6.12.1/drivers/net/can/spi/mcp251xfd/ |
D | mcp251xfd-crc16.c | 24 0x0000, 0x8005, 0x800f, 0x000a, 0x801b, 0x001e, 0x0014, 0x8011, 25 0x8033, 0x0036, 0x003c, 0x8039, 0x0028, 0x802d, 0x8027, 0x0022, 26 0x8063, 0x0066, 0x006c, 0x8069, 0x0078, 0x807d, 0x8077, 0x0072, 27 0x0050, 0x8055, 0x805f, 0x005a, 0x804b, 0x004e, 0x0044, 0x8041, 28 0x80c3, 0x00c6, 0x00cc, 0x80c9, 0x00d8, 0x80dd, 0x80d7, 0x00d2, 29 0x00f0, 0x80f5, 0x80ff, 0x00fa, 0x80eb, 0x00ee, 0x00e4, 0x80e1, 30 0x00a0, 0x80a5, 0x80af, 0x00aa, 0x80bb, 0x00be, 0x00b4, 0x80b1, 31 0x8093, 0x0096, 0x009c, 0x8099, 0x0088, 0x808d, 0x8087, 0x0082, 32 0x8183, 0x0186, 0x018c, 0x8189, 0x0198, 0x819d, 0x8197, 0x0192, 33 0x01b0, 0x81b5, 0x81bf, 0x01ba, 0x81ab, 0x01ae, 0x01a4, 0x81a1, [all …]
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/linux-6.12.1/drivers/media/dvb-frontends/ |
D | au8522_dig.c | 25 } while (0) 34 { 0, 270 }, 68 { 15, 0 }, 149 { 15, 0 }, 221 for (i = 0; i < sz; i++) { in au8522_mse2snr_lookup() 224 ret = 0; in au8522_mse2snr_lookup() 241 r0b5 = 0x00; in au8522_set_if() 242 r0b6 = 0x3d; in au8522_set_if() 243 r0b7 = 0xa0; in au8522_set_if() 247 r0b5 = 0x00; in au8522_set_if() [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/oss/ |
D | osssys_6_1_0_offset.h | 29 // base address: 0x4280 30 …IH_VMID_0_LUT 0x0000 31 …e regIH_VMID_0_LUT_BASE_IDX 0 32 …IH_VMID_1_LUT 0x0001 33 …e regIH_VMID_1_LUT_BASE_IDX 0 34 …IH_VMID_2_LUT 0x0002 35 …e regIH_VMID_2_LUT_BASE_IDX 0 36 …IH_VMID_3_LUT 0x0003 37 …e regIH_VMID_3_LUT_BASE_IDX 0 38 …IH_VMID_4_LUT 0x0004 [all …]
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D | osssys_7_0_0_offset.h | 29 // base address: 0x4280 30 …IH_VMID_0_LUT 0x0000 31 …e regIH_VMID_0_LUT_BASE_IDX 0 32 …IH_VMID_1_LUT 0x0001 33 …e regIH_VMID_1_LUT_BASE_IDX 0 34 …IH_VMID_2_LUT 0x0002 35 …e regIH_VMID_2_LUT_BASE_IDX 0 36 …IH_VMID_3_LUT 0x0003 37 …e regIH_VMID_3_LUT_BASE_IDX 0 38 …IH_VMID_4_LUT 0x0004 [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
D | vcn_2_5_offset.h | 26 // base address: 0x1e000 27 …MMSCH_VF_VMID 0x000b 28 …ne mmMMSCH_VF_VMID_BASE_IDX 0 29 …MMSCH_VF_CTX_ADDR_LO 0x000c 30 …ne mmMMSCH_VF_CTX_ADDR_LO_BASE_IDX 0 31 …MMSCH_VF_CTX_ADDR_HI 0x000d 32 …ne mmMMSCH_VF_CTX_ADDR_HI_BASE_IDX 0 33 …MMSCH_VF_CTX_SIZE 0x000e 34 …ne mmMMSCH_VF_CTX_SIZE_BASE_IDX 0 35 …MMSCH_VF_MAILBOX_HOST 0x0012 [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/thm/ |
D | thm_9_0_offset.h | 27 // base address: 0x59800 28 …THM_TCON_CUR_TMP 0x0000 29 …ne mmTHM_TCON_CUR_TMP_BASE_IDX 0 30 …THM_TCON_HTC 0x0001 31 …ne mmTHM_TCON_HTC_BASE_IDX 0 32 …THM_TCON_THERM_TRIP 0x0002 33 …ne mmTHM_TCON_THERM_TRIP_BASE_IDX 0 34 …THM_GPIO_PROCHOT_CTRL 0x0004 35 …ne mmTHM_GPIO_PROCHOT_CTRL_BASE_IDX 0 36 …THM_GPIO_THERMTRIP_CTRL 0x0005 [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/mp/ |
D | mp_13_0_2_offset.h | 30 // base address: 0x0 31 …MP0_SMN_C2PMSG_32 0x0060 32 …e regMP0_SMN_C2PMSG_32_BASE_IDX 0 33 …MP0_SMN_C2PMSG_33 0x0061 34 …e regMP0_SMN_C2PMSG_33_BASE_IDX 0 35 …MP0_SMN_C2PMSG_34 0x0062 36 …e regMP0_SMN_C2PMSG_34_BASE_IDX 0 37 …MP0_SMN_C2PMSG_35 0x0063 38 …e regMP0_SMN_C2PMSG_35_BASE_IDX 0 39 …MP0_SMN_C2PMSG_36 0x0064 [all …]
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D | mp_13_0_4_offset.h | 30 // base address: 0x0 31 …MP0_SMN_C2PMSG_32 0x0060 33 …MP0_SMN_C2PMSG_33 0x0061 35 …MP0_SMN_C2PMSG_34 0x0062 37 …MP0_SMN_C2PMSG_35 0x0063 39 …MP0_SMN_C2PMSG_36 0x0064 41 …MP0_SMN_C2PMSG_37 0x0065 43 …MP0_SMN_C2PMSG_38 0x0066 45 …MP0_SMN_C2PMSG_39 0x0067 47 …MP0_SMN_C2PMSG_40 0x0068 [all …]
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D | mp_14_0_2_offset.h | 28 // base address: 0x0 29 …MP1_SMN_C2PMSG_0 0x0040 31 …MP1_SMN_C2PMSG_1 0x0041 33 …MP1_SMN_C2PMSG_2 0x0042 35 …MP1_SMN_C2PMSG_3 0x0043 37 …MP1_SMN_C2PMSG_4 0x0044 39 …MP1_SMN_C2PMSG_5 0x0045 41 …MP1_SMN_C2PMSG_6 0x0046 43 …MP1_SMN_C2PMSG_7 0x0047 45 …MP1_SMN_C2PMSG_8 0x0048 [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/lsdma/ |
D | lsdma_6_0_0_offset.h | 29 // base address: 0x45000 30 …LSDMA_UCODE_ADDR 0x0000 31 …e regLSDMA_UCODE_ADDR_BASE_IDX 0 32 …LSDMA_UCODE_DATA 0x0001 33 …e regLSDMA_UCODE_DATA_BASE_IDX 0 34 …LSDMA_ERROR_INJECT_CNTL 0x0004 35 …e regLSDMA_ERROR_INJECT_CNTL_BASE_IDX 0 36 …LSDMA_ERROR_INJECT_SELECT 0x0005 37 …e regLSDMA_ERROR_INJECT_SELECT_BASE_IDX 0 38 …LSDMA_CONTEXT_GROUP_BOUNDARY 0x001f [all …]
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/linux-6.12.1/drivers/tty/vt/ |
D | consolemap.c | 44 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, 45 0x0008, 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f, 46 0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017, 47 0x0018, 0x0019, 0x001a, 0x001b, 0x001c, 0x001d, 0x001e, 0x001f, 48 0x0020, 0x0021, 0x0022, 0x0023, 0x0024, 0x0025, 0x0026, 0x0027, 49 0x0028, 0x0029, 0x002a, 0x002b, 0x002c, 0x002d, 0x002e, 0x002f, 50 0x0030, 0x0031, 0x0032, 0x0033, 0x0034, 0x0035, 0x0036, 0x0037, 51 0x0038, 0x0039, 0x003a, 0x003b, 0x003c, 0x003d, 0x003e, 0x003f, 52 0x0040, 0x0041, 0x0042, 0x0043, 0x0044, 0x0045, 0x0046, 0x0047, 53 0x0048, 0x0049, 0x004a, 0x004b, 0x004c, 0x004d, 0x004e, 0x004f, [all …]
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/linux-6.12.1/sound/pci/ymfpci/ |
D | ymfpci.h | 22 #define YDSXGR_INTFLAG 0x0004 23 #define YDSXGR_ACTIVITY 0x0006 24 #define YDSXGR_GLOBALCTRL 0x0008 25 #define YDSXGR_ZVCTRL 0x000A 26 #define YDSXGR_TIMERCTRL 0x0010 27 #define YDSXGR_TIMERCOUNT 0x0012 28 #define YDSXGR_SPDIFOUTCTRL 0x0018 29 #define YDSXGR_SPDIFOUTSTATUS 0x001C 30 #define YDSXGR_EEPROMCTRL 0x0020 31 #define YDSXGR_SPDIFINCTRL 0x0034 [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/sdma0/ |
D | sdma0_4_1_offset.h | 27 // base address: 0x4980 28 …SDMA0_UCODE_ADDR 0x0000 29 …ne mmSDMA0_UCODE_ADDR_BASE_IDX 0 30 …SDMA0_UCODE_DATA 0x0001 31 …ne mmSDMA0_UCODE_DATA_BASE_IDX 0 32 …SDMA0_VM_CNTL 0x0004 33 …ne mmSDMA0_VM_CNTL_BASE_IDX 0 34 …SDMA0_VM_CTX_LO 0x0005 35 …ne mmSDMA0_VM_CTX_LO_BASE_IDX 0 36 …SDMA0_VM_CTX_HI 0x0006 [all …]
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D | sdma0_4_0_offset.h | 27 // base address: 0x4980 28 #define mmSDMA0_UCODE_ADDR 0x0000 29 #define mmSDMA0_UCODE_ADDR_BASE_IDX 0 30 #define mmSDMA0_UCODE_DATA 0x0001 31 #define mmSDMA0_UCODE_DATA_BASE_IDX 0 32 #define mmSDMA0_VM_CNTL 0x0004 33 #define mmSDMA0_VM_CNTL_BASE_IDX 0 34 #define mmSDMA0_VM_CTX_LO 0x0005 35 #define mmSDMA0_VM_CTX_LO_BASE_IDX 0 36 #define mmSDMA0_VM_CTX_HI 0x0006 [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/athub/ |
D | athub_1_0_offset.h | 27 // base address: 0x3080 28 #define mmATC_ATS_CNTL 0x0000 29 #define mmATC_ATS_CNTL_BASE_IDX 0 30 #define mmATC_ATS_STATUS 0x0003 31 #define mmATC_ATS_STATUS_BASE_IDX 0 32 #define mmATC_ATS_FAULT_CNTL 0x0004 33 #define mmATC_ATS_FAULT_CNTL_BASE_IDX 0 34 #define mmATC_ATS_FAULT_STATUS_INFO 0x0005 35 #define mmATC_ATS_FAULT_STATUS_INFO_BASE_IDX 0 36 #define mmATC_ATS_FAULT_STATUS_ADDR 0x0006 [all …]
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/linux-6.12.1/drivers/media/usb/usbtv/ |
D | usbtv-audio.c | 73 return 0; in snd_usbtv_pcm_open() 81 atomic_set(&chip->snd_stream, 0); in snd_usbtv_pcm_close() 85 return 0; in snd_usbtv_pcm_close() 92 chip->snd_buffer_pos = 0; in snd_usbtv_prepare() 93 chip->snd_period_pos = 0; in snd_usbtv_prepare() 95 return 0; in snd_usbtv_prepare() 109 case 0: in usbtv_audio_urb_received() 130 period_elapsed = 0; in usbtv_audio_urb_received() 132 for (i = 0; i < urb->actual_length; i += USBTV_CHUNK_SIZE) { in usbtv_audio_urb_received() 177 { USBTV_BASE + 0x0008, 0x0001 }, in usbtv_audio_start() [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/sdma1/ |
D | sdma1_4_0_offset.h | 27 // base address: 0x5180 28 #define mmSDMA1_UCODE_ADDR 0x0000 29 #define mmSDMA1_UCODE_ADDR_BASE_IDX 0 30 #define mmSDMA1_UCODE_DATA 0x0001 31 #define mmSDMA1_UCODE_DATA_BASE_IDX 0 32 #define mmSDMA1_VM_CNTL 0x0004 33 #define mmSDMA1_VM_CNTL_BASE_IDX 0 34 #define mmSDMA1_VM_CTX_LO 0x0005 35 #define mmSDMA1_VM_CTX_LO_BASE_IDX 0 36 #define mmSDMA1_VM_CTX_HI 0x0006 [all …]
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